NCL30088
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22
Bulk rail
VS
CS
v
DD
R
sense
R
CS
I
CS(offset)
Q_drv
Figure 64. Line Feed−Forward Schematic
In Figure 64, Q_drv designates the output of the PWM latch which is high for the on−time and low otherwise.
Protections
The circuit incorporates a large variety of protections to
make the LED driver very rugged. Among them, we can list:
Output Short Circuit Situation
An overload fault is detected if the ZCD pin voltage
remains below V
ZCD(short)
for 90 ms. In such a situation, the
circuit stops generating pulses until the 4−s delay
auto−recovery time has elapsed (B and D versions) or
latches off (A and C versions).
Winding or Output Diode Short Circuit Protection
If a transformer winding happens to be shorted, the
primary inductance will collapse leading the current to ramp
up in a very abrupt manner. The V
ILIM
comparator (current
limitation threshold) will trip to open the MOSFET and
eventually stop the current rise. However, because of the
abnormally steep slope of the current, internal propagation
delays and the MOSFET turn−off time will make possible
the current rise up to 50% or more of the nominal maximum
value set by V
ILIM
. As illustrated in Figure 65, the circuit
uses this current overshoot to detect a winding short circuit.
The leading edge blanking (LEB) time for short circuit
protection (LEB2) is significantly faster than the LEB time
for cycle−by−cycle protection (LEB1). Practically, if four
consecutive switching periods lead the CS pin voltage to
exceed (V
CS(stop)
=150% *V
ILIM
), the controller enters
auto−recovery mode in B and D versions (4−s operation
interruption between active bursts) and latches off in A and
C versions. Similarly, this function can also protect the
power supply if the output diode is shorted or if the
transformer simply saturates.
Figure 65. Winding Short Circuit Protection, Max. Peak Current Limit Circuits
S
R
Q
Q
CS
LEB1
+
S
R
Q
Q
VCC
aux
Vcc
management
Vdd
VCCreset
(grand
reset)
DRV
Ipkmax
PWMreset
V
ILIMIT
+
LEB2
V
CS(stop)
WOD_SCP
+
STOP
SD Pin OVP
(OVP2)
UVLO
S
R
Q
Q
OTP
4−s timer
OFF
latch
latch
4−s timer
VCCreset
4−pulse
counter
AUX_SCP
VCC(ovp)
UVLO
BONOK
TSD
V
control
/ 4
AUTO RECOVERY
(B and D versions)
LATCHING − OFF
(A and C versions)
NCL30088
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23
V
CC
Over Voltage Protection
The circuit stops generating pulses if V
CC
exceeds
V
CC(OVP)
and enters auto−recovery mode. This feature
protects the circuit if the output LED string happens to open
or is disconnected.
Programmable Over Voltage Protection (OVP2)
Connect a Zener diode between V
CC
and the SD pin to set
a programmable V
CC
OVP (D
Z
of Figure 66). The triggering
level is (V
Z
+V
OVP
) where V
OVP
is the 2.5−V internal
threshold. If this protection trips, the NCL30088A and
NCL30088C latch off while the NCL30088B and
NCL30088D enter the auto−recovery mode.
Figure 66. Thermal Foldback and OVP/OTP Circuitry
S
R
Q
Q
grand reset
SD
VCC
I
OTP(REF)
+
Vdd
+
Clamp
Rclamp
Vclamp
Latch
OTP(off)
V / V
OVP
V
NTC
TF
V
S
R
Q
Q
4−s Timer
OFF
Thermal
Foldback
OTP(start)
T
SD(delay)
T
OTP(on)
SD Pin OVP (OVP2) DETECTION
OTP DETECTION
Z
D
NCL30088B / NCL30088D
(autorecovery versions)
NCP30088A / NCL30088C
(latching off versions)
The SD pin is clamped to about 1.35 V (V
clamp
) through
a 1.6−kW resistor (R
clamp
). It is then necessary to inject about
ǒ
V
OVP
* V
clamp
R
clamp
Ǔ
that is
ǒ
2.50 * 1.35
1.6 k
^ 700 mA
Ǔ
typically, to trigger the OVP protection. This current helps
ensure an accurate detection by using the Zener diode far
from its knee region
.
Programmable Over Temperature Foldback Protection
(OTP)
Connect an NTC between the SD pin and ground to detect
an over−temperature condition. In response to a high
temperature (detected if V
SD
drops below V
TF(start)
), the
circuit gradually reduces the LED current down 50% of its
nominal value when V
SD
reaches V
TF(stop)
, in accordance
with the characteristic of Figure 67.
If this thermal foldback cannot prevent the temperature
from rising (testified by V
SD
drop below V
OTP
), the circuit
latches off (A and C versions) or enters auto−recovery mode
(B and D versions) and cannot resume operation until V
SD
exceeds V
OTP(on)
to provide some temperature hysteresis
(around 10°C typically). The OTP thresholds nearly
correspond to the following resistances of the NTC:
Thermal foldback starts when R
NTC
R
TF(start)
(11.7 kW, typically)
Thermal foldback stops when R
NTC
R
TF(stop)
(8.0 kW,
typically)
OTP triggers when R
NTC
R
OTP(off)
(5.9 kW, typically)
OTP is removed when R
NTC
R
OTP(on)
(8.0 kW,
typically) (Note 9)
9. This condition is sufficient for operation recovery of the B and D versions. For the A and C versions which latch off when OTP triggers, the
circuit further needs to be reset by a V
CC
drop below V
CC(reset)
.
An online EXCEL
®
−based design tool is available to aid in selecting the appropriate NTC value.
NCL30088
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24
Figure 67. Output Current Reduction versus SD
Pin Voltage
At startup, when V
CC
reaches V
CC(on)
, the OTP
comparator is blanked for at least 250 ms in order to allow the
SD pin voltage to reach its nominal value if a filtering
capacitor is connected to the SD pin. This avoids flickering
of the LED light during turn on.
Brown−Out Protection
The NCL30088 prevents operation when the line voltage
is too low for proper operation. As illustrated in Figure 68,
the circuit detects a brown−out situation if the V
S
pin
remains below the V
BO(off)
threshold (0.9 V typical) for
more than the 25−ms blanking time. In this case, the
controller stops operating. Operation resumes as soon as the
V
S
pin voltage exceeds V
BO(on)
(1.0 V typical) and V
CC
is
higher than V
CC(on)
. To ease recovery, the circuit overrides
the V
CC
normal sequence (no need for V
CC
cycling down
below V
CC(off)
). Instead, its consumption immediately
reduces to I
CC(start)
so that V
CC
rapidly charges up to
V
CC(on)
. Once done, the circuit re−starts operating.
Figure 68. Brown−out Circuit
Die Over Temperature (TSD)
The circuit stops operating if the junction temperature (T
J
)
exceeds 150°C typically. The controller remains off until T
J
goes below nearly 100°C.
Pin Connection Faults
The circuit addresses most pin connection fault cases:
CS pin short to ground
The circuit senses the CS pin impedance every time it
starts−up and after DRV pulses terminated by the 36−ms
maximum on−time. If the measured impedance does
not exceed 120 ohm typically, the circuit stops
operating. In practice, it is recommended to place a
minimum of 250−ohm in series between the CS pin and
the current sense resistor to take into account possible
parametric deviations.
Fault of the GND connection
If the GND pin is properly connected, the supply
current drawn from the positive terminal of the V
CC
capacitor, flows out of the GND pin to return to the
negative terminal of the V
CC
capacitor. If the GND pin
is not connected, the circuit ESD diodes offer another
return path. The accidental non−connection of the GND
pin is monitored by detecting that one of the ESD diode
is conducting. Practically, the ESD diode of CS pin is
monitored. If such a fault is detected for 200 ms, the
circuit stops generating DRV pulses.
More generally, incorrect pin connection situations
(open, grounded, shorted to adjacent pin) are covered by
AND9204/D
.

NCL30088BDR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LED Lighting Drivers LED LIGHTING CONTRLR T
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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