LTC3203/LTC3203-1
LTC3203B/LTC3203B-1
6
32031fa
UU
U
PI FU CTIO S
C2
+
(Pin 1): Flying Capacitor 2 Positive Terminal (C2).
V
OUT
(Pin 2): Regulated Output Voltage. V
OUT
should be
bypassed with a low ESR ceramic capacitor as close to the
pin as possible for best performance. The capacitor should
have greater than 4.7µF capacitance under all conditions.
C1
+
(Pin 3): Flying Capacitor 1 Positive Terminal (C1).
SHDN (Pin 4): Active Low Shutdown Input. A low on SHDN
puts the LTC3203/LTC3203-1/LTC3203B/LTC3203B-1 in
low current shutdown mode. Do not float the SHDN pin.
V
SEL
(Pin 5) (LTC3203-1/LTC3203B-1): Output Voltage
Selection Input. A logic 0 at V
SEL
sets the regulated V
OUT
to 4.5V; and a logic 1 sets the regulated V
OUT
to 5V. Do not
float the V
SEL
pin.
FB (Pin 5) (LTC3203/LTC3203B): Feedback. The voltage
on this pin is compared to the internal reference voltage
(0.91V) by the error amplifier to keep the output in
regulation. An external resistor divider is required
between V
OUT
and FB to program the output voltage.
MODE (Pin 6): Mode Selection Input. The LTC3203/
LTC3203-1/LTC3203B/LTC3203B-1 operates in 1.5x
mode if the MODE pin is greater than V
MODEH
, which
gives higher charge pump efficiency. If the MODE pin is
less than V
MODEL
, the LTC3203/LTC3203-1/LTC3203B/
LTC3203B-1 operates in 2x mode, which gives a higher
charge pump boost voltage.
V
IN
(Pin 7): Input Supply Voltage. V
IN
should be bypassed
with a more than 2.2µF low ESR ceramic capacitor to GND.
C2
–
(Pin 8): Flying Capacitor 2 Negative Terminal (C2).
GND (Pin 9): Ground. This pin should be connected
directly to a low impedance ground plane.
C1
–
(Pin 10): Flying Capacitor 1 Negative Terminal (C1).
Exposed Pad (Pin 11): Ground. This pin must be sol-
dered to the PCB for electrical contact and rated thermal
performance.
