1. General description
The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device
features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7).
Data is entered serially through DSA or DSB and either input can be used as an active
HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH
transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the
register and forces all outputs LOW, independently of other inputs. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of V
CC
.
2. Features and benefits
Input levels:
For 74HC164: CMOS level
For 74HCT164: TTL level
Gated serial data inputs
Asynchronous master reset
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V.
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C.
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
Rev. 7 — 13 June 2013 Product data sheet
