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74HCT164N,652

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
74HC_HCT164 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 13 June 2013 7 of 20
NXP Semiconductors
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF; test circuit see Figure 10; unless otherwise specified
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC164
t
pd
propagation
delay
CP to Qn; see Figure 7
[1]
V
CC
= 2.0 V - 41 170 - 215 - 255 ns
V
CC
= 4.5 V - 15 34 - 43 - 51 ns
V
CC
= 5.0 V; C
L
=15pF - 12 - - - - - ns
V
CC
= 6.0 V - 12 29 - 37 - 43 ns
t
PHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
V
CC
= 2.0 V - 39 140 - 175 - 210 ns
V
CC
= 4.5 V - 14 28 - 35 - 42 ns
V
CC
= 5.0 V; C
L
=15pF - 11 - - - - - ns
V
CC
= 6.0 V - 11 24 - 30 - 36 ns
t
t
transition time see Figure 7
[2]
V
CC
= 2.0 V - 19 75 - 95 - 110 ns
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
V
CC
= 6.0 V - 6 13 - 16 - 19 ns
t
W
pulse width CP HIGH or LOW;
see Figure 7
V
CC
= 2.0 V 80 14 - 100 - 120 - ns
V
CC
= 4.5 V 16 5 - 20 - 24 - ns
V
CC
= 6.0 V 14 4 - 17 - 20 - ns
MR LOW; see Figure 8
V
CC
= 2.0 V 60 17 - 75 - 90 - ns
V
CC
= 4.5 V 12 6 - 15 - 18 - ns
V
CC
= 6.0 V 10 5 - 13 - 15 - ns
t
rec
recovery time MR to CP; see Figure 8
V
CC
= 2.0 V 60 17 - 75 - 90 - ns
V
CC
= 4.5 V 12 6 - 15 - 18 - ns
V
CC
= 6.0 V 10 5 - 13 - 15 - ns
t
su
set-up time DSA, and DSB to CP;
see Figure 9
V
CC
= 2.0 V 60 8 - 75 - 90 - ns
V
CC
= 4.5 V 12 3 - 15 - 18 - ns
V
CC
= 6.0 V 10 2 - 13 - 15 - ns
t
h
hold time DSA, and DSB to CP;
see Figure 9
V
CC
= 2.0 V +4 6- 4 - 4 - ns
V
CC
= 4.5 V +4 2- 4 - 4 - ns
V
CC
= 6.0 V +4 2- 4 - 4 - ns
74HC_HCT164 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 13 June 2013 8 of 20
NXP Semiconductors
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
f
max
maximum
frequency
for Cp, see Figure 7
V
CC
= 2.0 V 6 23 - 5 - 4 - MHz
V
CC
= 4.5 V 30 71 - 24 - 20 - MHz
V
CC
= 5.0 V; C
L
=15pF - 78 - - - - - MHz
V
CC
= 6.0 V 35 85 - 28 - 24 - MHz
C
PD
power
dissipation
capacitance
per package;
V
I
=GNDtoV
CC
[3]
-40- - - - - pF
74HCT164
t
pd
propagation
delay
CP to Qn; see Figure 7
[1]
V
CC
= 4.5 V - 17 36 - 45 - 54 ns
V
CC
= 5.0 V; C
L
=15pF - 14 - - - - - ns
t
PHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
V
CC
= 4.5 V - 19 38 - 48 - 57 ns
V
CC
= 5.0 V; C
L
=15pF - 16 - - - - - ns
t
t
transition time see Figure 7
[2]
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
t
W
pulse width CP HIGH or LOW;
see Figure 7
V
CC
= 4.5 V 18 7 - 23 - 27 - ns
MR LOW; see Figure 8
V
CC
= 4.5 V 18 10 - 23 - 27 - ns
t
rec
recovery time MR to CP; see Figure 8
V
CC
= 4.5 V 16 7 - 20 - 24 - ns
t
su
set-up time DSA, and DSB to CP;
see Figure 9
V
CC
= 4.5 V 12 6 - 15 - 18 - ns
t
h
hold time DSA, and DSB to CP;
see Figure 9
V
CC
= 4.5 V +4 2- 4 - 4 - ns
f
max
maximum
frequency
for Cp, see Figure 7
V
CC
= 4.5 V 27 55 - 22 - 18 - MHz
V
CC
= 5.0 V; C
L
=15pF - 61 - - - - - MHz
Table 7. Dynamic characteristics …continued
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF; test circuit see Figure 10; unless otherwise specified
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC_HCT164 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 13 June 2013 9 of 20
NXP Semiconductors
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] t
t
is the same as t
THL
and t
TLH
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
D
=C
PD
V
CC
2
f
i
N+ (C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
C
PD
power
dissipation
capacitance
per package;
V
I
=GNDtoV
CC
1.5 V
[3]
-40- - - - - pF
Table 7. Dynamic characteristics
…continued
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF; test circuit see Figure 10; unless otherwise specified
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
(1) Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 7. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency
Table 8. Measurement points
Type Input Output
V
M
V
M
V
X
V
Y
74HC164 0.5V
CC
0.5V
CC
0.1V
CC
0.9V
CC
74HCT164 1.3 V 1.3 V 0.1V
CC
0.9V
CC
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

74HCT164N,652

Mfr. #:
Buy 74HCT164N,652
Manufacturer:
NXP Semiconductors
Description:
Counter Shift Registers 8-BIT SI-PO SHIFT
Lifecycle:
New from this manufacturer.
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