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ADG759BCPZ-REEL7

P1-P3P4-P6P7-P9P10-P12
–4–
REV.
ADG758/ADG759–SPECIFICATIONS
1
DUAL SUPPLY
B Version
–40C
Parameter +25C to +85C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V
SS
to V
DD
V
ON Resistance (R
ON
) 2.5 Ω typ V
S
= V
SS
to V
DD
, I
DS
= 10 mA;
4.5 5 Ω max Test Circuit 1
ON Resistance Match Between 0.4 Ω typ
Channels (∆R
ON
) 0.8 Ω max V
S
= V
SS
to V
DD
, I
DS
= 10 mA
ON Resistance Flatness (R
FLAT(ON)
) 0.6 Ω typ V
S
= V
SS
to V
DD
, I
DS
= 10 mA
1.0 Ω max
LEAKAGE CURRENTS V
DD
= +2.75 V, V
SS
= –2.75 V
Source OFF Leakage I
S
(OFF) ± 0.01 nA typ V
S
= +2.25 V/–1.25 V, V
D
= –1.25 V/+2.25 V;
± 0.1 ± 0.3 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ± 0.01 nA typ V
S
= +2.25 V/–1.25 V, V
D
= –1.25 V/+2.25 V;
± 0.1 ± 0.75 nA max Test Circuit 3
Channel ON Leakage I
D
, I
S
(ON) ± 0.01 nA typ V
S
= V
D
= +2.25 V/–1.25 V; Test Circuit 4
± 0.1 ± 0.75 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
1.7 V min
Input Low Voltage, V
INL
0.7 V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
± 0.1 µA max
C
IN
, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
14 ns typ R
L
= 300 Ω, C
L
= 35 pF; Test Circuit 5
25 ns max V
S
= 1.5 V/0 V; Test Circuit 5
Break-Before-Make Time Delay, t
D
8 ns typ R
L
= 300 Ω, C
L
= 35 pF
1 ns min V
S
= 1.5 V; Test Circuit 6
t
ON
(EN) 14 ns typ R
L
= 300 Ω, C
L
= 35 pF
25 ns max V
S
= 1.5 V; Test Circuit 7
t
OFF
(EN) 8 ns typ R
L
= 300 Ω, C
L
= 35 pF
15 ns max V
S
= 1.5 V; Test Circuit 7
Charge Injection ± 3pC typ V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF;
Test Circuit 8
Off Isolation –60 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz
–80 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk –60 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz
–80 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
–3 dB Bandwidth 55 MHz typ R
L
= 50 Ω, C
L
= 5 pF; Test Circuit 11
C
S
(OFF) 13 pF typ f = 1 MHz
C
D
(OFF)
ADG758 85 pF typ f = 1 MHz
ADG759 42 pF typ f = 1 MHz
C
D
, C
S
(ON)
ADG758 96 pF typ f = 1 MHz
ADG759 48 pF typ f = 1 MHz
POWER REQUIREMENTS V
DD
= +2.75 V
I
DD
0.001 µA typ Digital Inputs = 0 V or 2.75 V
1.0 µA max
I
SS
0.001 µA typ V
SS
= –2.75 V
1.0 µA max Digital Inputs = 0 V or 2.75 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= +2.5 V 10%, V
SS
= –2.5 V 10%, GND = 0 V, unless otherwise noted.)
B
ADG758/ADG759
Rev. B | Page 5
ABSOLUTE MAXIMUM RATINGS
T
A
= 25C, unless otherwise noted.
Parameter Rating
V
DD
to V
SS
7 V
V
DD
to GND –0.3 V to +7 V
V
SS
to GND +0.3 V to –3.5 V
Analog Inputs
1
V
SS
– 0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Digital Inputs
1
–0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D 100 mA (Pulsed at 1 ms, 10%
Duty Cycle max)
Continuous Current, S or D 30 mA
Operating Temperature Range
Industrial (B Version) –40°C to +85°C
Storage Temperature Range –65°C to +150°C
Junction Temperature 150°C
Chip Scale Package,
θ
JA
Thermal Impedance
32°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
1
Overvoltages at EN, A, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Table I. ADG758 Truth Table
A2 A1 A0 EN Switch Condition
X X X 0 NONE
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8
X = Don’t Care
Table II. ADG759 Truth Table
A1 A0 EN ON Switch Pair
X X 0 NONE
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4
X = Don’t Care
PIN CONFIGURATIONS
02371-102
14
13
12
1
3
4
V
DD
15 GND
S5
S6
11
S7
EN
S1
2
V
SS
S2
5
S3
7
D
6
S4
8
NC
9
NC
10
S8
19
A0
20
NC
18
A1
17
A2
16
NC
ADG758
TOP VIEW
(Not to Scale)
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
02371-103
14
13
12
1
3
4
V
DD
15 GND
S1B
S2B
11
S3B
EN
S1A
2
V
SS
S2A
5
S3A
7
DA
6
S4A
8
NC
9
DB
10
S4B
19
A0
20
NC
18
NC
17
A1
16
NC
ADG759
TOP VIEW
(Not to Scale)
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
ADG758/ADG759
–6–
REV.
V
DD
Most Positive Power Supply Potential
V
SS
Most Negative Power Supply in a dual-supply application. In single-supply applications, this should be tied to
ground at the device.
GND Ground (0 V) Reference
S Source Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
IN Logic Control Input
R
ON
Ohmic Resistance between D and S
R
FLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over
the specified analog signal range.
I
S
(OFF) Source Leakage Current with the Switch OFF
I
D
(OFF) Drain leakage Current with the Switch OFF
I
D
, I
S
(ON) Channel Leakage current with the Switch ON
V
D
(V
S
)Analog Voltage on Terminals D, S
C
S
(OFF) OFF Switch Source Capacitance. Measured with reference to ground.
C
D
(OFF) OFF Switch Drain Capacitance. Measured with reference to ground.
C
D
, C
S
(ON) ON Switch Capacitance. Measured with reference to ground.
C
IN
Digital Input Capacitance
t
TRANSITION
Delay Time measured between the 50% and 90% points of the digital inputs and the switch ON condition when
switching from one address state to another.
t
ON
(EN) Delay Time between the 50% and 90% points of the EN digital input and the switch ON condition.
t
OFF
(EN) Delay Time between the 50% and 90% points of the EN digital input and the switch OFF condition.
t
OPEN
OFF Time measured between the 80% points of both switches when switching from one address state to another.
Off Isolation A measure of unwanted signal coupling through an OFF switch.
Crosstalk A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance.
Charge A measure of the glitch impulse transferred from the digital input to the analog output during switching.
Injection
On Response The Frequency Response of the ON Switch.
On Loss The Loss Due to the ON Resistance of the Switch
V
INL
Maximum Input Voltage for Logic “0”
V
INH
Minimum Input Voltage for Logic “1”
I
INL
(I
INH
) Input Current of the Digital Input
I
DD
Positive Supply Current
I
SS
Negative Supply Current
TERMINOLOGY
B
P1-P3P4-P6P7-P9P10-P12

ADG759BCPZ-REEL7

Mfr. #:
Buy ADG759BCPZ-REEL7
Manufacturer:
Analog Devices Inc.
Description:
Multiplexer Switch ICs 4:1 55MHz 3Ohm CMOS
Lifecycle:
New from this manufacturer.
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