13
FN7489.6
May 4, 2006
the EN pin. The applied logic signal is relative to GND pin.
Letting the EN
pin float or applying a signal that is less than
0.8V above GND will enable the amplifier. The amplifier will
be disabled when the signal at EN
pin is 2V above GND. The
V
EE
charge pump remains active.
Output Drive Capability
The ISL59830 does not have internal short-circuit protection
circuitry. A short-circuit current of 80mA sourcing and 150mA
sinking for the output is connected to half way between the
rails with a 10Ω resistor. If the output is shorted indefinitely,
the power dissipation could easily increase such that the part
will be destroyed. Maximum reliability is maintained if the
output current never exceeds ±40mA, after which the
electro-migration limit of the process will be exceeded and
the part will be damaged. This limit is set by the design of the
internal metal interconnections.
Power Dissipation
With the high output drive capability of the ISL59830, it is
possible to exceed the 150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
Θ
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
V
S
= Supply voltage
I
SMAX
= Maximum quiescent supply current
V
OUT
= Maximum output voltage of the application
R
LOAD
= Load resistance tied to ground
I
LOAD
= Load current
i = Number of output channels
By setting the two P
DMAX
equations equal to each other, we
can solve the output current and R
LOAD
to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
Strip line design techniques are recommended for the input
and output signal traces. As with any high frequency device,
a good printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as possible.
The power supply pin must be well bypassed to reduce the
risk of oscillation. For normal single supply operation, where
the V
S
- pin is connected to the ground plane, a single 4.7µF
tantalum capacitor in parallel with a 0.1µF ceramic capacitor
from V
S
+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split-internal supplies are to be used. In this case, the V
S
-
pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is also very important.
PD
MAX
T
JMAX
T
AMAX
–
Θ
JA
---------------------------------------------
=
PD
MAX
V
S
I
SMAX
V
S
V
OUT
i–()+×
V
OUT
i
R
L
i
-----------------
×=
PD
MAX
V
S
I
SMAX
V
OUT
iV
S
–()+× I
LOAD
i×=
ISL59830
