NXP Semiconductors
PSMN4R2-30MLD
N-channel 30 V, 4.2 mΩ logic level MOSFET in LFPAK33 using
NextPowerS3 Technology
PSMN4R2-30MLD All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet 11 August 2015 3 / 13
7. Marking
Table 4. Marking codes
Type number Marking code
PSMN4R2-30MLD 4D230L
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage 25 °C ≤ T
j
≤ 175 °C - 30 V
V
DGR
drain-gate voltage 25 °C ≤ T
j
≤ 175 °C; R
GS
= 20 kΩ - 30 V
V
GS
gate-source voltage -20 20 V
P
tot
total power dissipation T
mb
= 25 °C; Fig. 1 - 65 W
V
GS
= 10 V; T
mb
= 25 °C; Fig. 2 [1] - 70 AI
D
drain current
V
GS
= 10 V; T
mb
= 100 °C; Fig. 2 - 65 A
I
DM
peak drain current pulsed; t
p
≤ 10 µs; T
mb
= 25 °C; Fig. 3 - 366 A
T
stg
storage temperature -55 175 °C
T
j
junction temperature -55 175 °C
T
sld(M)
peak soldering temperature - 260 °C
Source-drain diode
I
S
source current T
mb
= 25 °C - 54 A
I
SM
peak source current pulsed; t
p
≤ 10 µs; T
mb
= 25 °C - 366 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 25 A;
V
sup
≤ 30 V; R
GS
= 50 Ω; unclamped;
t
p
= 122 µs
[2] - 59 mJ
[1] Continuous current is limited by package
[2] Protected by 100% test
