SI1867DL-T1-GE3

AN814
Vishay Siliconix
Document Number: 71237
12-Dec-03
www.vishay.com
1
Dual-Channel LITTLE FOOTR SC-70 6-Pin MOSFET
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
This technical note discusses the pin-outs, package outlines,
pad patterns, evaluation board layout, and thermal
performance for dual-channel LITTLE FOOT power
MOSFETs in the SC-70 package. These new Vishay Siliconix
devices are intended for small-signal applications where a
miniaturized package is needed and low levels of current
(around 250 mA) need to be switched, either directly or by
using a level shift configuration. Vishay provides these devices
with a range of on-resistance specifications in 6-pin versions.
The new 6-pin SC-70 package enables improved
on-resistance values and enhanced thermal performance.
PIN-OUT
Figure 1 shows the pin-out description and Pin 1 identification
for the dual-channel SC-70 device in the 6-pin configuration.
FIGURE 1.
SOT-363
SC-70 (6-LEADS)
6
4
1
2
3
5
Top View
S
1
G
1
D
2
D
1
G
2
S
2
For package dimensions see outline drawing SC-70 (6-Leads)
(http://www.vishay.com/doc?71154)
BASIC PAD PATTERNS
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286) for the 6-pin
SC-70. This basic pad pattern is sufficient for the low-power
applications for which this package is intended. For the 6-pin
device, increasing the pad patterns yields a reduction in
thermal resistance on the order of 20% when using a 1-inch
square with full copper on both sides of the printed circuit board
(PCB).
EVALUATION BOARDS FOR THE DUAL
SC70-6
The 6-pin SC-70 evaluation board (EVB) measures 0.6 inches
by 0.5 inches. The copper pad traces are the same as
described in the previous section, Basic Pad Patterns. The
board allows interrogation from the outer pins to 6-pin DIP
connections permitting test sockets to be used in evaluation
testing.
The thermal performance of the dual SC-70 has been
measured on the EVB with the results shown below. The
minimum recommended footprint on the evaluation board was
compared with the industry standard 1-inch square FR4 PCB
with copper on both sides of the board.
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(the Package Performance)
Thermal performance for the dual SC-70 6-pin package
measured as junction-to-foot thermal resistance is 300_C/W
typical, 350_C/W maximum. The “foot” is the drain lead of the
device as it connects with the body. Note that these numbers
are somewhat higher than other LITTLE FOOT devices due to
the limited thermal performance of the Alloy 42 lead-frame
compared with a standard copper lead-frame.
Junction-to-Ambient Thermal Resistance
(dependent on PCB size)
The typical Rθ
JA
for the dual 6-pin SC-70 is 400_C/W steady
state. Maximum ratings are 460_C/W for the dual. All figures
based on the 1-inch square FR4 test board. The following
example shows how the thermal resistance impacts power
dissipation for the dual 6-pin SC-70 package at two different
ambient temperatures.
AN814
Vishay Siliconix
www.vishay.com
2
Document Number: 71237
12-Dec-03
SC-70 (6-PIN)
Room Ambient 25 _C Elevated Ambient 60 _C
P
D
+
T
J(max)
* T
A
Rq
JA
P
D
+
150
o
C * 25
o
C
400
o
CńW
P
D
+ 312 mW
P
D
+
T
J(max)
* T
A
Rq
JA
P
D
+
150
o
C * 60
o
C
400
o
CńW
P
D
+ 225 mW
NOTE: Although they are intended for low-power applications,
devices in the 6-pin SC-70 will handle power dissipation in
excess of 0.2 W.
Testing
To aid comparison further, Figure 2 illustrates the dual-channel
SC-70 thermal performance on two different board sizes and
two different pad patterns. The results display the thermal
performance out to steady state. The measured steady state
values of Rθ
JA
for the dual 6-pin SC-70 are as follows:
LITTLE FOOT SC-70 (6-PIN)
1) Minimum recommended pad pattern (see
Figure 2) on the EVB of 0.5 inches x
0.6 inches.
518_C/W
2) Industry standard 1” square PCB with
maximum copper both sides.
413_C/W
Time (Secs)
FIGURE 2. Comparison of Dual SC70-6 on EVB and 1”
Square FR4 PCB.
Thermal Resistance (C/W)
0
1
500
100
200
100 1000
300
1010
-1
10
-2
10
-3
10
-4
10
-5
1” Square FR4 PCB
Dual EVB
400
The results show that if the board area can be increased and
maximum copper traces are added, the thermal resistance
reduction is limited to 20%. This fact confirms that the power
dissipation is restricted with the package size and the Alloy 42
leadframe.
ASSOCIATED DOCUMENT
Single-Channel LITTLE FOOT SC-70 6-Pin MOSFET Copper
Leadframe Version, REcommended Pad Pattern and Thermal
Performance, AN815, (http://www.vishay.com/doc?71334).
Application Note 826
Vishay Siliconix
www.vishay.com Document Number: 72602
18 Revision: 21-Jan-08
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead
0.096
(2.438)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.067
(1.702)
0.026
(0.648)
0.045
(1.143)
0.016
(0.406)
0.026
(0.648)
0.010
(0.241)
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SI1867DL-T1-GE3

Mfr. #:
Manufacturer:
Vishay
Description:
IC LOAD SW LEVEL SHIFTER SC-70-6
Lifecycle:
New from this manufacturer.
Delivery:
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