7
LTC1771
The basic LTC1771 application circuit is shown in Figure
1 on the first page. External component selection is driven
by the load requirement and begins with the selection of
R
SENSE
. Once R
SENSE
is known, L can be chosen. Next, the
MOSFET and D1 are selected. The inductor is chosen
based largely on the desired amount of ripple current and
for Burst Mode operation. Finally C
IN
is selected for its
ability to handle the required RMS input current and C
OUT
is chosen with low enough ESR to meet the output voltage
ripple and transient specifications.
R
SENSE
Selection
R
SENSE
is chosen based on the required output current.
The LTC1771 current comparator has a maximum thresh-
old of 140mV/R
SENSE
. The current comparator threshold
sets the peak inductor current, yielding a maximum aver-
age output current I
MAX
equal to the peak less half the
peak-to-peak ripple current I
L
. For best performance
when Burst Mode operation is enabled, choose I
L
equal
to 35% of peak current. Allowing a margin for variations in
the LTC1771 and external components gives the following
equation for choosing R
SENSE
:
R
SENSE
= 100mV/I
MAX
At higher supply voltages, the peak currents may be
slightly higher due to overshoot from current comparator
delay and can be predicted from the second term in the
following equation:
I
R
VV
LH
PEAK
SENSE
IN OUT
≅+
µ
014
05
12
.
.
()
/
Inductor Value Selection
Once R
SENSE
is known, the inductor value can be deter-
mined. The inductance value has a direct effect on ripple
current. The ripple current decreases with higher induc-
tance and increases with higher V
OUT
. The ripple current
during continuous mode operation is set by the off-time
and inductance to be:
∆=
+
It
VV
L
L CONT OFF
OUT D
()
where t
OFF
= 3.5µs. However, the ripple current at low
loads during Burst Mode operation is:
I
L(BURST)
35% of I
PEAK
0.05/R
SENSE
For best efficiency when Burst Mode operation is enabled,
choose:
I
L(CONT)
I
L(BURST)
so that the inductor current is continuous during the burst
periods. This sets a minimum inductor value of:
L
MIN
= (75µH)(V
OUT
+ V
D
)(R
SENSE
)
When burst is disabled, ripple currents less than I
L(BURST)
can be achieved by choosing L > L
MIN
. Lower ripple
current reduces output voltage ripple and core losses, but
too low of ripple current will adversely effect efficiency.
Inductor Core Selection
Once the value of L is known, the type of inductor must be
selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite,
molypermalloy or Kool Mµ
®
cores. Actual core loss is
independent of core size for a fixed inductor value, but is
very dependent on inductance selected. As inductance
increases, core losses go down. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent increase in voltage ripple.
Do not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are space efficient, especially
when you can use several layers of wire. Because they
generally lack a bobbin, mounting is more difficult. How-
ever, designs for surface mount are available that do not
increase the height significantly.
Kool Mµ is a registered trademark of Magnetics, Inc.
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8
LTC1771
Power MOSFET Selection
An external P-channel power MOSFET must be selected
for use with the LTC1771. The main selection criteria for
the power MOSFET are the threshold voltage V
GS(TH)
and
the “on” resistance R
DS(ON)
, reverse transfer capacitance
and total gate charge.
Since the LTC1771 can operate down to input voltages as
low as 2.8V, a sublogic level threshold MOSFET (R
DS(ON)
guaranteed at V
GS
= 2.5V) is required for applications that
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC1771 is less than
the absolute maximum V
GS
rating (typically 12V), as the
MOSFET gate will see the full supply voltage.
The required R
DS(ON)
of the MOSFET is governed by its
allowable power dissipation. For applications that may
operate the LTC1771 in dropout, i.e. 100% duty cycle, at
its worst case the required R
DS(ON)
is given by:
R
P
I
DS ON
P
OUT MAX P
()
()
=
()
+
()
2
1 δ
where P
P
is the allowable power dissipation and δ
P
is the
temperature dependency of R
DS(ON)
. (1 + δ
P
) is generally
given for a MOSFET in the form of a normalized R
DS(ON)
vs
temperature curve, but = 0.005/°C can be used as an
approximation for low voltage MOSFETs.
In applications where the maximum duty cycle is less than
100% and the LTC1771 is in continuous mode, the R
DS(ON)
is governed by:
R
P
DC I
DC
VV
VV
DS ON
P
OUT P
OUT D
IN D
()
=
()
+
()
=
+
+
2
1 δ
where DC is the maximum operating duty cycle of the
LTC1771.
Catch Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the
diode conducts most of the time. As V
IN
approaches V
OUT
the diode conducts only a small fraction of the time. The
most stressful condition for the diode is when the output
is short-circuited. Under this condition, the diode must
safely handle I
PEAK
at close to 100% duty cycle.
To maximize both low and high current efficiencies, a fast
switching diode with low forward drop and low reverse
leakage should be used. Low reverse leakage current is
critical to maximize low current efficiency since the leak-
age can potentially exceed the magnitude of the LTC1771
supply current. Low forward drop is critical for high
current efficiency since loss is proportional to forward
drop. The effect of reverse leakage and forward drop on
no- load supply current and efficiency for various Schottky
diodes is shown in Table 1. As can be seen, these are
conflicting parameters and the user must weigh the
importance of each spec in choosing the best diode for the
application.
Table 1. Effect of Catch Diode on Performance
LEAKAGE NO-LOAD EFFICIENCY
DIODE (V
R
= 3.3V) V
F
@ 1A SUPPLY CURRENT AT 10V/1A
MBR0540 0.25µA 0.50V 10.4µA 86.3%
UPS5817 2.8µA 0.41V 11.8µA 88.2%
MBR0520 3.7µA 0.36V 12.2µA 88.4%
MBRS120T3 4.4µA 0.43V 12.2µA 87.9%
MBRM120LT3 8.3µA 0.32V 14.0µA 89.4%
MBRS320 19.7µA 0.29V 20.0µA 89.8%
C
IN
and C
OUT
Selection
At higher load currents, when the inductor current is
continuous, the source current of the P-channel MOSFET
is a square wave of duty cycle V
OUT
/V
IN
. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
capacitor current is given by:
C
IVVV
V
IN
MAX OUT IN OUT
IN
required I
RMS
=
()
[]
12/
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
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LTC1771
ripple current ratings are often based on 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Do not underspecify this component. An addi-
tional 0.1µF ceramic capacitor is also helpful on V
IN
for
high frequency decoupling.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisfied, the capacitance is adequate for filtering.
The output ripple (V
OUT
) in continuous mode is approxi-
mated by:
∆≈ +
V I ESR
fC
OUT RIPPLE
OUT
1
8
where f is the operating frequency, C
OUT
is the output
capacitance and I
RIPPLE
is the ripple current in the
inductor. For output ripple less than 100mV, assure C
OUT
required ESR is <2R
SENSE
.
The first condition relates to the ripple current into the ESR
of the output capacitance while the second term guaran-
tees that the output capacitance does not significantly
discharge during the operating frequency period due to
ripple current. The choice of using smaller output capaci-
tance increases the ripple voltage due to the discharging
term but can be compensated for by using capacitors of
very low ESR to maintain the ripple voltage at or below
50mV. The I
TH
pin OPTI-LOOP
TM
compensation compo-
nents can be optimized to provide stable, high perfor-
mance transient response regardless of the output
capacitors selected.
When running into dropout, extra input and output capaci-
tance may be necessary for optimal performance due to
the drop in frequency as the duty cycle approaches 100%.
Compare Figure 1 to the low dropout regulators shown in
the Typical Applications section for recommended C
IN
,
C
OUT
, C
FF
and C
C
values for low dropout regulators vs
regulators not requiring low dropout.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR for its
size of any aluminum electrolytic at a somewhat higher
price. Typically once the ESR requirement is satisfied, the
RMS current rating generally far exceeds the I
RIPPLE(P-P)
requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum
electrolytics and dry tantalum capacitors are both available
in surface mount configurations. In case of tantalum, it is
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the
AVX TPS, AVX TPSV and KEMET T510 series of surface
mount tantalums, available in case heights ranging from
2mm to 4mm. Other capacitor types include Sanyo
OS-CON, Sanyo POSCAP, Nichicon PL series and
Panasonic SP.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 +L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in the LTC1771 circuits: the LTC1771 DC bias
current, MOSFET gate charge current, I
2
R losses and
catch diode losses.
1. The DC bias current is 9µA at no load and increases
proportionally with load up to a constant 150µA during
continuous mode. This bias current is so small that this
loss is negligible at loads above a milliamp but at no
load accounts for nearly all of the loss.
2. The MOSFET gate charge current results from switch-
ing the gate capacitance of the power MOSFET switch.
Each time the gate is switched from high to low to high
again, a packet of charge dQ moves from V
IN
to ground.
The resulting dQ/dt is the current out of V
IN
which is
typically much larger than the DC bias current. In
OPTI-LOOP is a trademark of Linear Technology Corporation.
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LTC1771ES8#TRPBF

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Analog Devices / Linear Technology
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Switching Voltage Regulators Low Iq Step-dn DC/DC Controller
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