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CY2XP22ZXCT

P1-P3P4-P6P7-P9P10-P12P13-P14
CY2XP22
Document Number: 001-10229 Rev. *H Page 4 of 14
Absolute Maximum Conditions
Parameter Description Conditions Min Max Unit
V
DD
Supply Voltage –0.5 4.4 V
V
IN
[1]
Input Voltage, DC Relative to V
SS
–0.5 V
DD
+ 0.5 V
T
S
Temperature, Storage Non operating –65 150 C
T
J
Temperature, Junction – 135 C
ESD
HBM
ESD Protection, Human Body
Model
JEDEC STD 22-A114-B 2000 – V
UL–94 Flammability Rating At 1/8 in. V–0
JA
[2]
Thermal Resistance, Junction to
Ambient
0 m/s airflow 100 C/W
1 m/s airflow 91
2.5 m/s airflow 87
Operating Conditions
Parameter Description Min Max Unit
V
DD
3.3 V Supply Voltage 3.135 3.465 V
2.5 V Supply Voltage 2.375 2.625 V
T
A
Ambient Temperature, Commercial 0 70 C
Ambient Temperature, Industrial –40 85 C
T
PU
Power up time for all V
DD
to reach minimum specified voltage (ensure power ramps
is monotonic)
0.05 500 ms
Notes
1. The voltage on any input or IO pin cannot exceed the power pin during power up.
2. Simulated using Apache Sentinel TI software. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of copper
(2/1/1/2 oz.). The internal layers are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model.
CY2XP22
Document Number: 001-10229 Rev. *H Page 5 of 14
DC Electrical Characteristics
Parameter Description Test Conditions Min Typ Max Unit
I
DD
Operating Supply Current with
output unterminated
V
DD
= 3.465 V, F
OUT
= 125 MHz,
output unterminated
– – 125 mA
V
DD
= 2.625 V, F
OUT
= 125 MHz,
output unterminated
– – 120 mA
I
DDT
Operating Supply Current with
output terminated
V
DD
= 3.465 V, F
OUT
= 125 MHz,
output terminated
– – 150 mA
V
DD
= 2.625 V, F
OUT
= 125 MHz,
output terminated
– – 145 mA
V
OH
LVPECL Output High Voltage V
DD
= 3.3 V or 2.5 V,
R
TERM
= 50 to V
DD
– 2.0 V
V
DD
– 1.15 – V
DD
– 0.75 V
V
OL
LVPECL Output Low Voltage V
DD
= 3.3 V or 2.5 V,
R
TERM
= 50 to V
DD
– 2.0 V
V
DD
– 2.0 – V
DD
– 1.625 V
V
OD1
LVPECL Peak-to-Peak Output
Voltage Swing
V
DD
= 3.3 V or 2.5 V,
R
TERM
= 50 to V
DD
– 2.0 V
600 – 1000 mV
V
OD2
LVPECL Output Voltage Swing
(V
OH
– V
OL
)
V
DD
= 2.5 V,
R
TERM
= 50 to V
DD
– 1.5 V
500 – 1000 mV
V
OCM
LVPECL Output Common Mode
Voltage (V
OH
+ V
OL
)/2
V
DD
= 2.5 V,
R
TERM
= 50 to V
DD
– 1.5 V
1.2 – – V
V
IH
Input High Voltage, F_SEL 0.7 × V
DD
–V
DD
+ 0.3 V
V
IL
Input Low Voltage, F_SEL –0.3 – 0.3 × V
DD
V
I
IH
Input High Current, F_SEL F_SEL = V
DD
––115µA
I
IL
Input Low Current, F_SEL F_SEL = V
SS
–50 – – µA
C
IN
[3]
Input Capacitance, F_SEL – 15 – pF
C
INX
[3]
Pin Capacitance, XIN & XOUT – 4.5 – pF
CY2XP22
Document Number: 001-10229 Rev. *H Page 6 of 14
AC Electrical Characteristics
Parameter
[4]
Description Conditions Min Typ Max Unit
F
OUT
Output Frequency 62.5 – 125 MHz
T
R
, T
F
Output Rise or Fall Time 20% to 80% of full output swing – 0.5 1.0 ns
T
Jitter()
RMS Phase Jitter (Random) 125 MHz, (1.875–20 MHz) – 0.4 – ps
T
DC
Output Duty Cycle Measured at zero crossing point 48 50 52 %
T
LOCK
Startup Time Time for CLK to reach valid
frequency measured from the time
V
DD
= V
DD
(min.)
– – 5 ms
T
LFS
Re-lock Time Time for CLK to reach valid
frequency from F_SEL pin change
– – 1 ms
Recommended Crystal Specifications
Parameter
[5]
Description Min Max Unit
Mode Mode of Oscillation Fundamental
F Frequency 25 25 MHz
ESR Equivalent Series Resistance – 50
C
0
Shunt Capacitance – 7 pF
Notes
4. Not 100% tested, guaranteed by design and characterization.
5. Characterized using an 18 pF parallel resonant crystal.
P1-P3P4-P6P7-P9P10-P12P13-P14

CY2XP22ZXCT

Mfr. #:
Buy CY2XP22ZXCT
Manufacturer:
Cypress Semiconductor
Description:
IC CLOCK GEN PLL LVPECL 8TSSOP
Lifecycle:
New from this manufacturer.
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