72016© Integrated Device Technology, Inc. Revision E, January 5, 2016
8545 Datasheet
Parameter Measurement Information
3.3V LVDS Output Load AC Test Circuit
Part-to-Part Skew
Output Duty Cycle/Pulse Width/Period
Differential Output Level
Output Skew
Propagation Delay
-
V
DD
GND
tsk(pp)
Part 1
Part 2
Qx
Qx
Qy
Qy
Q0:Q3
Q0:Q3
-
V
DD
GND
Q0
:Q3
Q0:Q3
Qx
Qx
Qy
Qy
tp
LH
Q0:Q3
Q0:Q3
CLK1,
CLK2
82016© Integrated Device Technology, Inc. Revision E, January 5, 2016
8545 Datasheet
Parameter Measurement Information, continued
Output Rise/Fall Time
Offset Voltage Setup
High Impedance Leakage Current Setup
Power Off Leakage Setup
Differential Output Voltage Setup
Differential Output Short Circuit Setup
20%
80%
80%
20%
t
R
t
F
V
OD
Clock
Outputs
out
out
LVDS
DC Inpu
t
3.3V±5% POWER SUPPLY
Float GND
+
_
I
OZ
I
OZ
LVDS
I
OFF
V
DD
out
out
LVDS
DC Input
I
OSD
V
DD
92016© Integrated Device Technology, Inc. Revision E, January 5, 2016
8545 Datasheet
Parameter Measurement Information, continued
Output Short Circuit Current Setup
Applications Information
Recommendations for Unused Input and Output Pins
Inputs:
CLK Inputs
For applications not requiring the use of a clock input, it can be left
floating. Though not required, but for additional protection, a 1k
resistor can be tied from the CLK input to ground.
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional protection.
A 1k resistor can be used.
Outputs:
LVDS O ut p ut s
All unused LVDS output pairs can be either left floating or terminated
with 100 across. If they are left floating, there should be no trace
attached.
out
LVDS
DC Input
I
OS
I
OSB
V
DD
out

8545BGLFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 1-to-4 LVCMOS/LVTTL- to-LVDS Fanout Buffe
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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