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N74F299D,623

P1-P3P4-P6P7-P9P10-P12
Philips Semiconductors Product data
74F2998-bit universal shift/storage register (3-State)
2003 Feb 05
7
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25 °C T
amb
= 0 °C to +70 °C
SYMBOL PARAMETER TEST CONDITIONS
V
CC
= +5.0 V V
CC
= +5.0 V ± 10%
UNIT
C
L
= 50 pF, R
L
= 500 Ω C
L
= 50 pF, R
L
= 500 Ω
MIN TYP MAX MIN MAX
f
Maximum clock frequency
I/O
Waveform 1
70 100 70 MHz
f
MAX
Ma
x
im
u
m
clock
freq
u
enc
y
Qn
Wa
v
eform
1
85 115 85 MHz
t
PLH
t
PHL
Propagation delay
CP to Q0 or Q7
Waveform 1
4.0
4.5
5.0
6.0
7.5
8.0
3.5
4.5
8.5
8.5
ns
ns
t
PLH
t
PHL
Propagation delay
CP to I/On
Waveform 1
4.0
4.0
6.0
6.5
9.0
9.0
4.0
4.0
10.0
10.0
ns
ns
t
PHL
Propagation delay
MR to Q0 or Q7
Waveform 2 5.5 7.5 9.5 5.5 10.5 ns
t
PHL
Propagation delay
MR to I/On
Waveform 2 5.5 7.5 10.0 5.5 10.5 ns
t
PZH
t
PZL
Output Enable time
Sn, OE
to I/On
Waveform 4
Waveform 5
3.5
4.0
6.0
7.5
8.0
10.0
3.5
4.0
9.0
11.0
ns
ns
t
PHZ
t
PLZ
Output Disable time
Sn, OE to I/On
Waveform 4
Waveform 5
2.5
1.5
4.5
2.5
7.0
5.5
2.5
1.5
8.0
6.5
ns
ns
AC SET-UP REQUIREMENTS
LIMITS
T
amb
= +25 °C T
amb
= 0 °C to +70 °C
SYMBOL PARAMETER TEST CONDITIONS
V
CC
= +5.0 V V
CC
= +5.0 V ± 10%
UNIT
C
L
= 50 pF, R
L
= 500 Ω C
L
= 50 pF, R
L
= 500 Ω
MIN TYP MAX MIN MAX
t
s
(H)
t
s
(L)
Set-up time, HIGH or LOW
S0 or S1 to CP
Waveform 3
6.5
6.5
7.5
7.5
ns
ns
t
h
(H)
t
h
(L)
Hold time, HIGH or LOW
S0 or S1 to CP
Waveform 3
0
0
0
0
ns
ns
t
s
(H)
t
s
(L)
Set-up time, HIGH or LOW
I/On, DS
L
or DS
R
to CP
Waveform 3
3.5
3.5
4.0
4.0
ns
ns
t
h
(H)
t
h
(L)
Hold time, HIGH or LOW
I/On, DS
L
or DS
R
to CP
Waveform 3
0
0
0
0
ns
ns
t
w
(H)
t
w
(L)
CP Pulse width, HIGH or LOW Waveform 1
5.0
4.5
5.0
4.5
ns
t
w
(L) MR Pulse width, LOW Waveform 2 4.5 4.5 ns
t
rec
Recovery time, MR to CP Waveform 2 4.0 4.0 ns
Philips Semiconductors Product data
74F2998-bit universal shift/storage register (3-State)
2003 Feb 05
8
AC WAVEFORMS
For all waveforms, V
M
= 1.5 V
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
t
PLH
t
PHL
V
M
V
M
V
M
1/f
MAX
t
W
(L)
CP
Q0, Q7, I/On
t
W
(H)
SF00869
Waveform 1. Propagation delay, clock input to output,
clock width, and maximum clock frequency
V
M
V
M
V
M
t
PHL
t
W
(L) t
REC
V
M
Q0, Q7, I/On
CP
MR
SF00870
Waveform 2. Master Reset pulse width, Master Reset to output
delay, and Master Reset to clock recovery time
V
M
V
M
V
M
V
M
V
M
V
M
S0, S1,
I/On
DS
L
,
DS
R
CP
SF00871
t
s
(H) t
h
(H) t
h
(L)t
s
(L)
Waveform 3. Set-up and hold times
V
M
V
M
V
M
t
PHZ
t
PZH
Sn, OEn
I/On
V
OH
-0.3V
0V
SF00872
Waveform 4. 3-State Output Enable time to HIGH level
and Output Disable time from HIGH level
V
M
V
M
V
M
t
PLZ
t
PZL
Sn, OEn
I/On
V
OL
+0.3V
SF00873
Waveform 5. 3-State Output Enable time to LOW level and
Output Disable time from LOW level
Philips Semiconductors Product data
74F2998-bit universal shift/storage register (3-State)
2003 Feb 05
9
TEST CIRCUIT AND WAVEFORM
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL
(
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
1MHz 500ns
2.5ns 2.5ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for 3-State Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
t
THL
(
t
f
)
t
TLH
(
t
r
)
t
TLH
(
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
R
L
7.0V
SF00777
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
SWITCH POSITION
P1-P3P4-P6P7-P9P10-P12

N74F299D,623

Mfr. #:
Buy N74F299D,623
Manufacturer:
NXP Semiconductors
Description:
Counter Shift Registers OCTAL SHIFT/STORAGE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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