LTC4125EUFD#PBF Datasheet LTC4125EUFD#PBF, LTC4125IUFD#PBF, LTC4125EUFD#TRPBF | P16-P18

LTC4125

4125f

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SW2

SW1

TANK

FB2

FB1

FB2

FB1

LTC4125

4125 F08

RED INDICATES HIGH VOLTAGE

Figure8. FB Pin Rectifier and Divider

The diode D

reverse voltage rating needs to withstand

the highest peak-to-peak voltage generated at V

TANK

across

its operating range. From the resonant capacitor section,

the peak-to-peak voltage generated in the tank is twice

the maximum voltage developed across the capacitor.

Therefore in the particular example shown in Figure7,

with an expected maximum RMS current of the LC tank

at 3A, the maximum peak to peak voltage developed in

the tank is 130V.

Aside from its reverse voltage rating, the other param

eters of the diode are not critical—in most applications,

the smallest packaged diode with the appropriate voltage

rating is selected.

The capacitor C

FB1

voltage rating needs to withstand the

maximum peak voltage generated by the tank, which is

65V for the example shown in Figure7.

The value of C

FB1

is also important. The value needs to be

selected such that the time constant C

FB1

FB2

) is

smaller than twice the time interval T2—the settling time

after each step. This ensures that the voltage developed

at C

FB1

has enough time to settle at each step during the

sweep. Therefore, the value of C

FB1

needs to satisfy the

following criteria:

FB1

2 R

FB1

FB2

( )

1.92 • 10

( )

FB1

FB2

= 0.1µF typ

( )

rating must be able to withstand this voltage. The maximum

voltage the capacitor must withstand is given by:

CMAX

LMAX

ωC

• I

RMS _MAX

ωC

where I

LMAX

is the maximum inductor current during

operation in the series LC circuit.

In the specific application shown in Figure7, a 100nF 100V

C0G capacitor (C3216C0G2A104J160AC) is used. The Q

value of the capacitor at 100kHz is not explicitly listed

in the data sheet but based on empirical measurement

it is much higher than the quality factor of the inductor

selected. With an expected maximum RMS current of 3A

(see Figure9 in the Feedback section immediately following

this section), and using the formula for V

CMAX

above, the

maximum voltage developed across the capacitor is 65V.

At 100nF, the resonant frequency that results with the

24µH inductor is 103kHz. Notice that the LC tank on the

receiver is tuned to 127kHz. This intentional difference in

tuning frequency is to ensure that the DHC feature in the

LTC4120 receiver IC functions properly given all the toler

ances of the passive components—please see LTC4120

data sheet for details.

For all other applications without a

dynamic tuning feature, the transmit LC frequency should

be tuned about 20% lower than the receive LC resonant

frequency.

FEEDBACK

The next step involved in a typical design is determining

the values of the feedback resistors. LTC4125 monitors

the voltage developed on the transmit coil via the feedback

(FB) pin. The Optimum Power Search uses this FB pin

voltage to determine an appropriate transmit power level.

In order to detect the peak of the transmit coil voltage, a

half wave rectifier consisting of a diode and a capacitor

is used as shown in Figure8. For the ensuing discussion,

please refer to Figure 9 and Figure 13 as well.

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4125f

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Figure9 shows this sweep for the circuit shown in Figure7.

Note that the LTC4120 is set to charge a single cell Li-Ion

battery in the Constant Current mode at 400mA at the

maximum target separation of 10mm.

DUTY CYCLE (%)

VOLTAGE (V)

CURRENT (A)

70.0

30.0

60.0

50.0

40.0

20.0

10.0

3.50

1.50

3.00

2.50

2.00

1.00

0.50

35 4015 20

4125 F09

5025 3010 455

TANK

RECT

CHG

Figure9. V

TANK

, I

, V

RECT

and I

CHG

vs Duty Cycle with

LTC4120 at the Receiver in CC Mode at 10mm Spacing

In this particular example, the tank voltage generated at

the optimum point is 50V (V

TANK-MAX

), and the maximum

input RMS current is 1.3A. To prevent an FB voltage

overrange fault, the divider needs to ensure that when

TANK

=55V, V

is less than V

—note 55V is picked

to give ~10% margin above the observed 50V max tank

voltage. Therefore, the resistor divider ratio should be set

according to the following formula:

TANK−MAX

FB1

FB2

⎛

⎝

⎜

⎞

⎠

⎟

• V

+ V

FB1

FB2

TANK−MAX

– V

– 1≈

55 – 1

– 1= 10

where V

is the diode drop of the rectification diode

used to rectify the LC tank voltage. Note that for a robust

design, functionality at all operating conditions needs

to be reverified once the feedback resistor dividers and

capacitors are chosen.

The recommended values for R

FB1

and R

FB2

are such that

FB1

+ R

FB2

≈ 100k. A typical recommended starting value

for C

FB1

is 0.1µF. Refer to the Timer Capacitor section in

the later part of this Applications Information on details

for setting the value of T2.

The capacitor C

FB2

is optional in most applications. It can

be used to clean up the signal at the FB pin further. This

capacitor voltage rating only needs to be 6V or less, and

its value needs to be selected such that the time constant

FB2

//R

FB1

) is again less than twice the time interval

T2—the wait time after each step. Therefore, the value of

FB2

needs to satisfy the following criterion:

FB2

2 R

FB1

FB2

( )

1.92 • 10

( )

FB1

FB2

A 0.1µF C

FB2

capacitor is recommended and sufficient for

most applications.

The ratio of the resistor divider R

FB1

and R

FB2

is selected

based on the maximum tank voltage (V

TANK

). Follow these

steps when determining the maximum tank voltage:

1. Set the distance and orientation of the receiver coil with

respect to the transmit coil for the lowest coupling (this

condition usually requires the highest tank current, and

therefore, the highest tank voltage).

2. Short the two LTC4125 PTH pins together.

3. Sweep V

PTH

voltage.

4. Monitor the following: (see Figure 9)

a. Transmit tank voltage (V

TANK

in Figure 8)

b. Transmit circuit input RMS current

c. Rectified voltage at the receiver

d. Charge current at the receiver

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is reduced to zero until the next search interval. Input cur-

rent limit is also programmable using R

, R

IMON

and R

LIM

IMON

•

ILIM

IMON

•

1.20V

where 1.20V is the typical V

ILIM

As mentioned in the Operation section, for the same values

of R

, R

IMON

and R

, this input current limit is 150% of

the input current threshold.

Notice that the user has the ability to set the input current

threshold and limit by choosing values for three different

components. For most applications, the voltage drop across

at the current limit threshold is recommended to be

less than 50mV, and the ratio of R

IMON

to R

to be in the

range of 10-40, with R

in the order of 10kΩ.

In the Figure7 example, the desired current threshold and

limit are 1.3A and 1.95A respectively. The R

is set to

be 20mΩ to limit the drop across it to 40mV at the input

current limit. With R

set to 11.3kΩ, the R

IMON

value is

348kΩ, yielding the final current threshold and limit of

1.3A and 1.95A respectively.

If the input current is time varying or noisy, as would be

expected of a sinusoidal load of an LC tank, add filtering

capacitors C

and C

IMON

to obtain a time average voltage

at the IMON pin that corresponds to the time average value

of the current through the input current sense resistor.

The value of C

and C

IMON

should be selected such that

the time constants R

and R

IMON

are less than

T2—the settling time interval between each step in the

Optimum Power Search algorithm (Figure6). This is to

ensure that a current threshold exit condition can be de

tected within a single step in the search. In the example

of Figure7, both C

and C

IMON

are set to 10nF.

FREQUENCY THRESHOLD (FTH PIN)

As discussed in the Operation section, the AutoResonant

Drive used in the LTC4125 drives the external LC tank at

its resonant frequency. The frequency threshold input

(FTH) serves as the primary protection feature against

inadvertently transmitting power into a foreign object.

INPUT CURRENT LIMIT SETTING AND MONITORING

–

3V TO 5.5V

IMON

LTC4125

4125 F10

IMON

Figure10. Input Current Limit and Monitoring

Figure10 shows the architecture employed by the LTC4125

for the input current monitoring. The input current thresh-

old, used as one of the exit conditions in the proprietary

Optimum Power Sear

ch algorithm

, is set using a combi-

nation of R

, R

and R

IMON

resistors according to the

following formula:

( )

IMON

•

ITH

IMON

•

0.80V

where 0.80V is the typical V

ITH

The input current through the sense resistor R

is avail-

able for monitoring through the IMON pin. The voltage at

the IMON

pin varies with the current through the sense

resistor (R

) as follows:

IMON

• R

• I

RIS

One of the fault conditions, the input current limit, is also

detected via the IMON pin. If the input current limit is

reached after a valid exit condition is found, transmit power

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Wireless Charging ICs 5W AutoResonant Wireless Pwr Transmitter

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