OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

ATMEGA128-16MU

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
16
2467XS–AVR–06/11
ATmega128
SEI ; set global interrupt enable
4. Stabilizing time needed when changing OSCCAL Register
After increasing the source clock frequency more than 2% with settings in the OSCCAL reg-
ister, the device may execute some of the subsequent instructions incorrectly.
Problem Fix / Workaround
The behavior follows errata number 3., and the same Fix / Workaround is applicable on this
errata.
5. IDCODE masks data from TDI input
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
– If ATmega128 is the only device in the scan chain, the problem is not visible.
– Select the Device ID Register of the ATmega128 by issuing the IDCODE instruction
or by entering the Test-Logic-Reset state of the TAP controller to read out the
contents of its Device ID Register and possibly data from succeeding devices of the
scan chain. Issue the BYPASS instruction to the ATmega128 while reading the
Device ID Registers of preceding devices of the boundary scan chain.
– If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega128 must be the fist device in the chain.
6. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
17
2467XS–AVR–06/11
ATmega128
Datasheet
Revision
History
Please note that the referring page numbers in this section are referred to this document. The
referring revision in this section are referring to the document revision.
Rev. 2467X-06/11 1. Corrected typos in “Ordering Information” on page 12.
Rev. 2467W-05/11 1. Added Atmel QTouch Library Support and QTouch Sensing Capability Features.
2. Updated “DC Characteristics” on page 318.
R
RST
maximum value changed from 60kΩ
to 85kΩ.
3. Updated “Ordering Information” on page 12 to include Tape & Reel devices.
Rev. 2467V-02/11 1. Updated the literature number (2467) that accidently changed in rev U.
2. Editing update according to the Atmel new style guide. No more space betweeen the
numbers and their units.
3. Reorganized the swapped chapters in rev U: 8-bit Timer/Counter 0, 16-bit TC1 and
TC3, and 8-bit TC2 with PWM.
Rev. 2467U-08/10 1. Updated “Ordering Information” on page 12. Added Ordering information for Appen-
dix A ATmega128/L 105°C.
Rev. 2467T-07/10 1. Updated the “USARTn Control and Status Register B – UCSRnB” on page 189.
2. Added a link from “Minimizing Power Consumption” on page 47 to “System Clock
and Clock Options” on page 35.
3. Updated use of Technical Terminology in datasheet
4. Corrected formula in Table 133, “Two-wire Serial Bus Requirements,” on page 322
5. Note 6 and Note 7 below Table 133, “Two-wire Serial Bus Requirements,” on page 322
have been removed
Rev. 2467S-07/09 1. Updated the “Errata” on page 15.
2. Updated the TOC with the newest template (version 5.10).
3. Added note “Not recommended from new designs“ from the front page.
4. Added typical I
CC
values for Active and Idle mode in “DC Characteristics” on page
318.
Rev. 2467R-06/08 1. Removed “Not recommended from new designs“ from the front page.
18
2467XS–AVR–06/11
ATmega128
Rev. 2467Q-05/08 1. Updated “Preventing EEPROM Corruption” on page 24.
Removed sentence “If the detection level of the internal BOD does not match the needed
detection level, and external low V
CC
Reset Protection circuit can be used.“
2. Updated Table 85 on page 196 in “Examples of Baud Rate Setting” on page 193.
Remomved examples of frequencies above 16MHz.
3. Updated Figure 114 on page 238.
Inductor value corrected from 10mH to 10µH.
4. Updated description of “Version” on page 253.
5. ATmega128L removed from “DC Characteristics” on page 318.
6. Added “Speed Grades” on page 320.
7. Updated “Ordering Information” on page 12.
Pb-Plated packages are no longer offered, and the ordering information for these packages
are removed.
There will no longer exist separate ordering codes for commercial operation range, only
industrial operation range.
8. Updated “Errata” on page 15:
Merged errata description for rev.F to rev.M in “ATmega128 Rev. F to M”.
Rev. 2467P-08/07 1. Updated “Features” on page 1.
2. Added “Data Retention” on page 8.
3. Updated Table 60 on page 133 and Table 95 on page 235.
4. Updated “C Code Example
(1)
” on page 176.
5. Updated Figure 114 on page 238.
6. Updated “XTAL Divide Control Register – XDIV” on page 36.
7. Updated “Errata” on page 15.
8. Updated Table 34 on page 76.
9. Updated “Slave Mode” on page 166.
Rev. 2467O-10/06 1. Added note to “Timer/Counter Oscillator” on page 43.
2. Updated “Fast PWM Mode” on page 124.
3. Updated Table 52 on page 104, Table 54 on page 104, Table 59 on page 133, Table 61
on page 134, Table 64 on page 156, and Table 66 on page 157.
4. Updated “Errata” on page 15.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

ATMEGA128-16MU

Mfr. #:
Buy ATMEGA128-16MU
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU 128kB Flash 4kB EEPROM 53 I/O Pins
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet