MAX1954A
Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit
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Detailed Description
The MAX1954A single-output, current-mode, PWM, step-
down DC-DC controller features foldback current limit
and switches at 300kHz for high efficiency. The
MAX1954A is designed to drive a pair of external N-
channel power MOSFETs in a synchronous buck topolo-
gy to improve efficiency and cost compared with a
P-channel power-MOSFET topology. The on-resistance
of the low-side MOSFET is used for short-circuit current-
limit sensing, while the high-side MOSFET’s on-resis-
tance is used for current-mode feedback, thus
eliminating the need for current-sense resistors. The
short-circuit current limit is fixed at 135mV. The foldback
current scheme reduces the input current during short-
circuit and severe-overload conditions. The MAX1954A
is configured with a high-side drain input (HSD) allowing
an extended input voltage range of 3V to 13.2V that is
independent of the IC input supply (Figure 1).
DC-DC Converter Control Architecture
The MAX1954A step-down converter uses a PWM, cur-
rent-mode control scheme. An internal transconductance
amplifier establishes an integrated error voltage. An
open-loop comparator compares the integrated voltage-
feedback signal against the amplified current-sense sig-
nal plus the slope compensation ramp, which is summed
into the main PWM comparator to preserve inner-loop sta-
bility and eliminate inductor staircasing. At each rising
edge of the internal clock, the high-side MOSFET turns on
until the PWM comparator trips or the maximum duty
cycle is reached. During this on-time, current ramps up
through the inductor, storing energy in a magnetic field
and sourcing current to the output. The current-mode
feedback system regulates the peak inductor current as a
function of the output-voltage error signal. The circuit acts
as a switch-mode transconductance amplifier because
the average inductor current is close to the peak inductor
current (assuming the inductor is large enough to provide
a reasonably small ripple current). This pushes the output
inductance-capacitance filter pole normally found in a
voltage-mode PWM to a higher frequency.
Connect to the high-side MOSFET drain using a Kelvin connection.
Pull to GND to shut down the IC. See the Compensation Design section for instructions on calculating the RC
values.
Feedback Input. Regulates at V
= 0.8V. Connect FB to the center tap of a resistor-divider from the output to
GND to set the output voltage.
IC Supply Voltage. Provides power for the IC. Connect to a 3V to 5.5V power supply. Bypass to GND with a
0.22µF ceramic capacitor and to PGND with a 1µF ceramic capacitor.
Low-Side Gate-Drive Output. Drives the synchronous-rectifier MOSFET. Swings from 0 to V
. DL is low in
shutdown and UVLO.
. DH is low in shutdown and UVLO.
point for the current limit.
High-Side MOSFET Supply Input. Connect a 0.1µF ceramic capacitor from BST to LX to supply the necessary
gate drive for the high-side N-channel MOSFET.
