PCA9500 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 4.1 — 5 May 2017 4 of 29
NXP Semiconductors
PCA9500
8-bit I
2
C-bus and SMBus I/O port with 2-kbit EEPROM
5. Block diagram
Fig 1. Block diagram of PCA9500
PCA9500
POWER-ON
RESET
002aae585
V
SS
V
DD
I
2
C-BUS/SMBus
CONTROL
INPUT
FILTER
SCL
SDA
8-bit
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
INPUT/
OUTPUT
PORTS
write pulse
read pulse
300 kΩ
A0
A1
A2
EEPROM
256 × 8
WC
PCA9500 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 4.1 — 5 May 2017 5 of 29
NXP Semiconductors
PCA9500
8-bit I
2
C-bus and SMBus I/O port with 2-kbit EEPROM
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2. Pin configuration for SO16 Fig 3. Pin configuration for TSSOP16
Fig 4. Pin configuration for HVQFN16
PCA9500D
A0 V
DD
A1 SDA
A2 SCL
IO0 WC
IO1 IO7
IO2 IO6
IO3 IO5
V
SS
IO4
002aae582
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
V
DD
SDA
SCL
WC
IO7
IO6
IO5
IO4
A0
A1
A2
IO0
IO1
IO2
IO3
V
SS
PCA9500PW
002aae583
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
SCL
WC
IO7
IO6
002aae584
PCA9500BS
Transparent top view
IO3
V
SS
IO4
IO5
A1
A2
V
DD
SDA
4 9
3 10
2 11
1 12
5
6
7
8
16
15
14
13
terminal 1
index area
A2
IO0
IO1
IO2
Table 3. Pin description
Symbol Pin Description
SO16, TSSOP16 HVQFN16
A0 1 15 address lines (internal pull-up)
A1 2 16
A2 3 1
IO0 4 2 quasi-bidirectional I/O pins
IO1 5 3
IO2 6 4
IO3 7 5
IO4 9 7
IO5 10 8
IO6 11 9
IO7 12 10
PCA9500 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 4.1 — 5 May 2017 6 of 29
NXP Semiconductors
PCA9500
8-bit I
2
C-bus and SMBus I/O port with 2-kbit EEPROM
[1] HVQFN16 package supply ground is connected to both V
SS
pin and exposed center pad. V
SS
pin must be
connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level
performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the
board and for proper heat conduction through the board, thermal vias need to be incorporated in the
printed-circuit board in the thermal pad region.
V
SS
86
[1]
supply ground
WC
13 11 active LOW write control pin
SCL 14 12 I
2
C-bus serial clock
SDA 15 13 I
2
C-bus serial data
V
DD
16 14 supply voltage
Table 3. Pin description
…continued
Symbol Pin Description
SO16, TSSOP16 HVQFN16

PCA9500PW,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - I/O Expanders 8BIT I2C FMQB GPIO PU2K EEPROM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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