5©2018 Integrated Device Technology, Inc. March 1, 2018
9FGV1001, 9FGV1002, and 9FGV1004 PhiClock™ PCIe Evaluation Board User Guide
The circuit is designed for maximum flexibility when testing all possible logic types. Default assembly uses a 0.1μF capacitor in place of
R14 and R16, and the short across R14 and R16 is cut. No other devices are assembled. This simple AC-coupled configuration allows for
testing phase noise and jitter of all possible logic types. The circuit can be modified for custom tests. TP3 is a position to place a
differential FET probe.
Operating Instructions
1. Set all jumpers for power supply choices (E1–E6), interface choices (JP1 and JP2), and set the U2 switches.
2. Connect an interface: USB or I
2
C.
3. In the case of an I
2
C interface, also connect external power supply to jacks J3, J4 and J5.
4. Start Timing Commander for either USB or Aardvark.
a. Start new configuration or load TCS file for existing configuration.
b. Choose PhiClock personality.
c. For Aardvark, click to select Aardvark “Connection Interface”.
d. For a new configuration, prepare all settings.
e. Click to connect to the 9FGV100x device. Top right should turn green.
f. Click to write all settings to the 9FGV100x device.
g. It should now be possible to measure clocks on outputs.
h. While connected, each change to the settings will be written to the 9FGV100x immediately and can be observed at the clock outputs.
