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ADP5588ACPZ-R7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
Data Sheet ADP5588
Rev. C | Page 9 of 28
Autoincrement
The ADP5588 features automatic increment during I
2
C read
access. This allows the user to increment the address pointer
without having to send a read command for subsequent
addresses. This minimizes processor intervention and, therefore,
saves processor bandwidth and current drain. Bit 7 of Register 0x01
must be set to initiate autoincrement (see Figure 16 for the full
write and read sequence).
Key Event Interrupt
On a key event (KE) interrupt, the processor reads the interrupt
register to determine the cause of the interrupt. If the KE_INT
bit in Register 0x02 is the cause of the interrupt, the state
machine sets the KE_INT bit and reads the key event count
from the KEC[3:0] field in Register 0x03 to determine the number
of events. It then reads the INT_STAT register (Register 0x02)
to make sure that no new events have come in. After all the
events are read, the KEC field is decremented to zero (KEC =0)
and the KE_INT bit can be cleared by writing a 1 to it. Both key
presses and key releases are capable of generating key event
interrupts. The KE_INT bit cannot be cleared, and the
INT
pin
cannot be deasserted, until the FIFO is cleared of all events.
KP_MODE
KEC
REG. 0x1D
THROUGH 0x1F
REG. 0x03
READ KE(s) TO CLEAR
INT DRIVE
KE_INT
REG. 0x02
WRITE 1 TO CLEAR
KE_IEN
REG. 0x01
07673-011
AND
Figure 6. Key Event Interrupt Generation
Keypad Lock/Unlock Feature
The ADP5588 has a locking feature that allows the user to lock
the keypad or GPIs (configured to be part of the event table).
Once enabled, the keypad lock can prevent generation of key
event interrupts and key events to be recorded in the key event
table. This feature comprises the Unlock Key 1 and Unlock Key 2
registers (Register 0x0F and Register 0x10), the keypad lock
interrupt mask, the keypad unlock timers (Register 0x0E),
and the LCK1 and LCK2 bits, and the keylock enable bit
(Register 0x03).
The unlock keys can be programmed with any value of the keys
in the keypad matrix or any GPI values that are part of the key
event table. When the keypad lock interrupt mask timer is
enabled, the user must press two specific keys before a keylock
interrupt is generated or keypad events are recorded. After the
keypad is locked (set Bit 6, Register 0x03 to enable the lock), the
first time that the user presses any key, a key event interrupt is
generated. No additional interrupt is generated unless both
unlock key sequences are correct; then a keylock interrupt is
generated.
If the correct unlock keys are not pressed before the mask timer
expires, the state machine starts over. The first key event
interrupt is generated to allow the software to see that the user
has pressed a key so that the host can turn on the LCD and
display the unlock message. The host then reads the lock status
register to see if the keypad is unlocked. After the first key event
interrupt, the state machine does not interrupt the processor
again unless the correct sequence is keyed. The state machine
resets if the correct sequences are not keyed before the keypad
lock interrupt mask timer expires.
The state of the keypad lock interrupt mask bit (Register 0x01,
Bit 2) in the configuration register determines whether the
interrupt pin is asserted when the keylock interrupt status bit
(Register 0x02, Bit 2) is set. Setting the keylock interrupt mask
bit causes the
INT
pin to be asserted when the keylock interrupt
status bit is set in Register 0x02; clearing that bit masks the
interrupt, causing the interrupt pin not to respond to the keylock
interrupt status bit. The mask interrupt timer should be set for
the time that it takes for the LCD to dim or turn off so that, if a
key is pressed, the backlight is set to bright mode again or reset
to turn on the LCD.
When the unlock mask interrupt timer equals 0, only the
correct unlock sequence can generate an interrupt. Disabling
the unlock mask interrupt timer allows the processor to remain
undisturbed for situations in which the user has the phone in a
pocket or purse and the keys are constantly pressed. The flow
chart in Figure 6 shows the interaction of the interrupt mask
timer and interrupt generation.
GENERAL-PURPOSE INPUTS AND OUTPUTS
The ADP5588 supports up to 18 programmable GPIOs that can
be configured to address a variety of uses. Figure 7 shows the
makeup of a typical GPIO block where GPIOx represents any of
the 18 I/O lines.
DEBOUNCE
GPIOx
Dx_DIR
Dx_OUT
Dx_IN
Dx_IN_DBNC
Dx_PULL
V
CC
V
CC
07673-012
Figure 7. Typical GPIO Block
General Purpose Inputs (GPI)
The ADP5588 allows the user to configure all or some of its
GPIOs into GPIs (general-purpose inputs). After the GPIOs are
configured as GPIs, the user can opt to also turn on pull-up
resistors and interrupt generation capability, thus reducing the
amount of software monitoring and processor interaction and
saving power.
The programmed level of the GPI interrupt determines the
active level of the GPI pin. For example, if a GPI interrupt level
ADP5588 Data Sheet
Rev. C | Page 10 of 28
is programmed as high, a high on that pin is considered active
and meets the interrupt requirement. If the interrupt is pro-
grammed as low, a low on that pin is considered active and
meets the interrupt requirement.
GPI data and interrupt status are reflected in the GPIO interrupt
and data status registers (Register 0x11 through Register 0x16).
Caution must be taken during software implementation because
an interrupt may be set immediately after register settings. To
prevent this, correct logic levels must be present at the GPIs,
and the GPIO interrupt level must be set before GPIO interrupt
enable or GPI event FIFO enable registers are set. Figure 8 shows
the interrupt generation scheme, where Dx represents any one
of the 18 GPIOs.
Dx_IN
Dx_IN_IEN
REG. 0x23
THROUGH 0x25
Dx_IN_ISTAT
REG. 0x11
THROUGH 0x13
READ TWICE
TO CLEAR
GPI_INT
REG. 0x02
WRITE 1
TO CLEAR
REG. 0x01
INT
DRIVE
INTERRUPT
CONDITION
DECODE
Dx_ILVL
REG. 0x26
THROUGH 0x28
07673-013
AND
Figure 8. GPIO Interrupt Generation
GPI Events
A column or row configured as a GPI can be programmed to be
part of the key event table and therefore also capable of gener-
ating a key event interrupt. A key event interrupt caused by a
GPI follows the same process flow as a key event interrupt
caused by a key press. GPIs configured as part of the key event
table allow single key switches and other GPI interrupts to be
monitored. As part of the event table, GPIs are represented by
the decimal value 97 (0x61 or 1100001) through the decimal
value 114 (0x72 or 1110010). See Table 13 and Table 14 for GPI
event number assignments for rows and columns.
Table 13. GPI Event Number Assignments for Rows
R0 R1 R2 R3 R4 R5 R6 R7
97 98 99 100 101 102 103 104
Table 14. GPI Event Number Assignments for Columns
C0 C1 C2 C3 C4 C5 C6 C7 C8 C9
105 106 107 108 109 110 111 112 113 114
For a GPI that is set as active high, and is enabled in the key
event table, the state machine adds an event to the event count
and event table whenever that GPI goes high. If the GPI is set to
active low, a transition from high to low is considered a press
and is also added to the event count and event table. After the
interrupt state is met, the state machine internally sets an
interrupt for the opposite state programmed in the register to
prevent polling for the released state, thereby saving current.
After the released state is achieved, it is added to the event table.
The press and release are still indicated by Bit 7 in the event
register (Register 0x04 through Register 0x0D). The GPI events
can also be used as unlocked sequences.
When the GPI_EM_REGx bit in Register 0x20 through Register
0x22 is set, GPI events are not tracked when the keypad is
locked. The GPIEM_CFG bit (Register 0x01, Bit 6) must be
cleared for the GPI events to be tracked in the event counter
and event table when the keypad is locked.
50 Microsecond Interrupt Configuration
The ADP5588 gives the user the flexibility of deasserting the
interrupt for 50 μs while there is a pending event. When the
INT_CFG bit in Register 0x01 is set, any attempt to clear the
interrupt bit while the interrupt pin is already asserted results in
a 50 μs deassertion. When the INT_CFG bit is cleared, processor
interrupt remains asserted if the host tries to clear the interrupt.
This feature is particularly useful for software development and
edge triggering applications.
COMPARATOR 1 INTERRUPT
KEY EVENT INTERRUPT
KEYLOCK INTERRUPT
OVERFLOW INTERRUPT
COMPARATOR 2 INTERRUPT
GPIO INTERRUPT
INT
OR
INTERRUPT CONFIGURATION
OVR_FLOW_
IEN
K_LCK_IM GPI_IEN KE_IEN
GPIEM_
CFG
KEYPAD LOCK INTERRUPT MASK TIMER
K_LCK_EN
INT
LOGIC
V
CC
07673-014
Figure 9.
INT
Pin Drive
Data Sheet ADP5588
Rev. C | Page 11 of 28
START
MASK TIMER = 0
KEY PRESS
DETECTED
NO
NO
YES
NO
NO
NO
YES
YES
YES
NO
YES
YES
YES
NO
YES
YES
NO
NO
YES
YES
NO
GENERATE
KE INTERRUPT
START MASK TIMER
MASK TIMER
EXPIRES
MASK TIMER
EXPIRES
GENERATE
KEYLOCK INTERRUPT
FIRST UNLOCK
KEY DETECTED
SECOND UNLOCK
KEY DETECTED
START UNLOCK1 TO UNLOCK2
UNLOCK1 TO
UNLOCK2
TIMER EXPIRES
KEY PRESS
DETECTED
START UNLOCK1 TO UNLOCK2
FIRST UNLOCK
KEY DETECTED
GENERATE
KEYLOCK INTERRUPT
SECOND UNLOCK
KEY DETECTED
UNLOCK1 TO
UNLOCK2
TIMER EXPIRES
NO
07673-015
Figure 10. Keypad Lock Interrupt Mask Timer Flowchart
Debouncing
The ADP5588 has a 50 μs debounce time for GPIOs configured
as GPIs and rows in keypad scanning mode. The reset line
always has a 50 μs debounce time.
General Purpose Outputs (GPOs)
The ADP5588 allows the user to configure all or some of its
GPIOs as GPOs. These GPOs can be used as extra enables for
the host processor or simply as trigger outputs. When configured
as an output (GPO), a digital buffer drives the pin to 0 V for a 0
and to V
CC
for a 1. To s et any GPIO as a GPO, make sure that
the corresponding bits in Register 0x1D through Register 0x1F are
set for GPIO mode; then use Register 0x23 through Register 0x25
to set the corresponding bits for GPO mode.
Power-On Reset
For built-in power-up initialization for applications lacking a
power-on reset signal, a reset pin,
RST
, allows the user to reset
the registers to default values in the event of a brownout or
other reset conditions.
Ambient Light Sensing
The ADP5588 has built in light sensor comparator inputs to
detect ambient light conditions. An ADC samples the output of
external photosensors connected to the comparator inputs, and
the result is fed into programmable trip comparators. The ADC
has an input range of 0 μA to 1000 μA (typical). The device can
handle up to two photosensors (use Register 0x30 through
Register 0x3A to configure the photosensor inputs).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

ADP5588ACPZ-R7

Mfr. #:
Buy ADP5588ACPZ-R7
Manufacturer:
Analog Devices Inc.
Description:
Interface - I/O Expanders QWERTY Keypad Cntlr
Lifecycle:
New from this manufacturer.
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