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HI5767EVAL2

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
3-1
TM
AN9762
HI5767EVAL2 Evaluation Board User’s Manual
Description
The HI5767EVAL2 evaluation board allows the circuit
designer to evaluate the performance of the Intersil HI5767
monolithic 10-bit 20/40/60MSPS analog-to-digital converter
(ADC). As shown in the Evaluation Board Functional Block
Diagram, the evaluation board includes sample clock
generation circuitry, a single-ended to differential analog
input RF transformer configuration, an on board external
variable reference voltage generator and a digital data
output header/connector. The digital data outputs are
conveniently provided for easy interfacing to a ribbon
connector or logic probes. In addition, the evaluation board
includes some prototyping area for the addition of user
designed custom interfaces or circuits.
The sample clock generator circuit accepts the external
sampling signal through an SMA type RF connector, J2.
This input is AC-coupled and terminated in 50Ω allowing for
connection to most laboratory signal generators. In
addition, the duty cycle of the clock driving the A/D
converter is adjustable by way of a potentiometer. This
allows the effects of sample clock duty cycle on the HI5767
to be observed.
The analog input signal is also connected through an SMA
type RF connector, J1, and applied to a single-ended to
differential analog input RF transformer. This input is
AC-coupled and terminated in 50Ω allowing for connection
to most laboratory signal generators.
The converters’ digital data outputs along with two phases of
the sample clock (CLK and
CLK) are provided at the output
header/connector. With this output configuration the digital
data output transitions seen at the I/O header/connector are
essentially time aligned with the rising edge of the sampling
clock (CLK) or the falling edge of the out of phase sampling
clock (
CLK).
Refer to the component layout and the evaluation board
electrical schematic for the following discussions.
Evaluation Board Functional Block Diagram
+5V
D
V
REFIN
V
REFOUT
V
IN
-
10
CLOCK
DIGITAL
DGND
AGND
D
0
-D
9
HI5767
ANALOG
50Ω
+5V
D
+5V
A
-5V
A
OUT
DATA
V
IN
+
CLK
INPUT
OUT
CLK
(D0 - D9)
1.2V
BANDGAP
VOLTAGE
REFERENCE
SAMPLE
CLOCK
INPUT
+2.5V
GAIN
VAR
CLK
BIAS
TEE
J2
J1
RF
TRANSFORMER
Application Note January 1999
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
3-2
External Reference Voltage Generator,
V
REFOUT
and V
REFiN
The HI5767 has an internal reference voltage generator,
therefore no external reference voltage is required. The
evaluation board, however, offers the ability to use the
converters’ internal reference voltage, V
REFOUT
, or the on
board external variable reference voltage generator.
The external variable reference voltage circuitry is
implemented using the Intersil ICL8069 low voltage, 1.2V,
bandgap reference (D1) sourcing a non-inverting variable
gain operational amplifier circuit based on the Intersil
HA5127 ultra-low noise precision operational amplifier (U1).
Potentiometer VR1 is used to adjust the output voltage level
of this external voltage reference. With this the user is able
to observe the effects of reference voltage variations on the
converters performance. Turning VR1 in a clockwise (CW)
direction will decrease the external reference voltage while
turning VR1 in a counterclockwise (CCW) direction will
decrease the external reference voltage.
Selection of the reference voltage to be used by the
converter is accomplished by placing the P3 header jumper
across the appropriate pins. The converters’ internal
reference voltage generator, V
REFOUT
, must be connected
to V
REFIN
when using the converters internal reference and
is selected by placing the P3 header jumper across P3-2 and
P3-3. Alternately, if it is desired to use the on board external
variable reference voltage generator, selection of this option
is done by placing the P3 header jumper across P3-1 and
P3-2. See Appendix A, Board Layout for the location of the
P3 reference voltage selection header.
Analog Input
The fully differential analog input of the HI5767 A/D can be
configured in various ways depending on the signal source
and the required level of performance.
Differential Analog Input Configuration
A fully differential connection (Figure 1) will yield the best
performance from the HI5767 A/D converter. Since the
HI5767 is powered off a single +5V supply, the analog input
must be biased so it lies within the analog input common
mode voltage range of 0.25V to 4.75V. Figure 2 illustrates
the differential analog input common mode voltage, VDC,
range that the converter will accommodate. The
performance of the converter does not change significantly
with the value of the analog input common mode voltage.
A DC bias voltage source, V
DC
, equal to 3.0V (typical), is made
available to the user to help simplify circuit design when using
an AC coupled differential input. This low output impedance
voltage source is not designed to be a reference but makes an
excellent DC bias source and stays well within the analog input
common mode voltage range over temperature.
For the AC coupled differential input (Figure 1) and with
V
REFIN
connected to V
REFOUT
, full scale is achieved when
the V
IN
and -V
IN
input signals are 0.5V
P-P
, with -V
IN
being
180 degrees out of phase with V
IN
. The converter will be at
positive full scale when the V
IN
+ input is at V
DC
+ 0.25V and
the V
IN
- input is at V
DC
- 0.25V (V
IN
+-V
IN
- = +0.5V).
Conversely, the converter will be at negative full scale when
the V
IN
+ input is equal to V
DC
- 0.25V and V
IN
- is at
V
DC
+ 0.25V (V
IN
+-V
IN
- = -0.5V).
It should be noted that overdriving the analog input beyond
the ±0.5V fullscale input voltage range will not damage the
converter as long as the overdrive voltage stays within the
converters analog supply voltages. In the event of an
overdrive condition the converter will recover within one
sample clock cycle.
A single-ended input will give better overall system
performance if it is first converted to differential before
driving the HI5767. An RF transformer can be connected to
the HI5767 input to provide the single-ended to differential
conversion. The particular transformer used will depend on
the input voltage level, the impedance desired, and the input
frequency range. The transformer will tend to have a
bandpass response resulting in low and high frequency
V
IN
+
V
DC
V
IN
-
HI5767
V
IN
-V
IN
FIGURE 1. AC COUPLED DIFFERENTIAL INPUT
FIGURE 2A.
FIGURE 2B.
FIGURE 2C.
FIGURE 2. DIFFERENTIAL ANALOG INPUT COMMON MODE
VOLTAGE RANGE
V
IN
+V
IN
-
0.5V
P-P
VDC = 4.75V
+5V
+5V
V
IN
+
V
IN
-
0.5V
P-P
0.25V < VDC < 4.75V
0V
V
IN
+
V
IN
-
0.5V
P-P
VDC = 0.25V
0V
Application Note 9762
3-3
cutoffs. This is the type of single-ended to differential
conversion circuitry that is provided on the HI5767EVAL2
evaluation board (refer to the HI5767EVAL2 evaluation board
parts layout and the electrical schematics).
The HI5767EVAL2 evaluation board provides the single-
ended to differential analog front-end for converting the
typical laboratory signal generators 50Ω single-ended output
to a differential input signal for the converters differential-in-
differential-out sample-and-hold front end. The input of this
analog front-end, RF SMA connector J1, is AC coupled and
provides a termination impedance of 50Ω.
The Mini-Circuits T4-1 transformer, T1, provides a 1dB
passband from 2MHz to 100MHz. Since this transformer has a
1:4 primary to secondary impedance ratio the 200Ω secondary
impedance, created by the series resistance of R9 and R10, is
now transformed to 50Ω at the transformer primary side
(200/4 = 50).
Alternate transformers could be used with minor modifications
to the input circuit. For example, if one desired a narrower input
frequency range than that provided by the Mini-Circuits T4-1
transformer one could replace the T4-1 with a Mini-Circuits
TMO2.5-6T. The TMO2.5-6T transformer provides a 1dB
passband from 0.05MHz to 20MHz and has a 1:2.5 primary to
secondary impedance ratio. With this, the 200Ω secondary
load (two 100Ω resistors, R9 and R10, connected across the
transformer secondary) is now transformed to 80Ω
(200/2.5 = 80) at the transformer primary side input. In order to
achieve a 50Ω input impedance at the analog input connector,
J1, it would be necessary to install a 130Ω resistor in the R3
(A/R) location, i.e., the impedance now seen looking into the J1
SMA connector is 130Ω (R3) in parallel with 80Ω for an
effective impedance of 50Ω.
When using transformer coupling, care should be exercised
in the area of impedance matching or undesirable distortion
components could result from mismatching and affect the
overall measured performance of the converter.
Evaluation Board Layout and Power
Supplies
The HI5767 evaluation board is a four layer board with a
layout optimized for the best performance of the converter.
This application note includes an electrical schematic of the
evaluation board, a component parts list, a component
placement layout drawing and reproductions of the various
board layers used in the board stack-up. The user should
feel free to copy the layout in their application.
The HI5767 monolithic A/D converter has been designed
with separate analog and digital supply and ground pins to
keep digital noise out of the analog signal path. The
evaluation board provides separate low impedance analog
and digital ground planes on layer 2. Since the analog and
digital ground planes are connected together at a single
point where the power supplies enter the board, DO NOT tie
them together back at the power supplies.
The analog and digital supplies are also kept separate on
the evaluation board and should be driven by clean linear
regulated supplies. The external power supplies are hooked
up with the twisted pair wires soldered to the plated through
holes marked +5VAIN, +5VA1IN, -5VAIN, +5VDIN,
+5VD1IN, +5VD2IN, AGND and DGND near the prototyping
area. +5VDIN, +5VD1IN and +5VD2IN are digital supplies
and are returned to DGND. +5VAIN, +5VAIN1 and -5VAIN
are the analog supplies and are returned to AGND. Table 1
lists the operational supply voltages, typical current
consumption and the evaluation board circuit function being
powered. Single supply operation of the converter is
possible but the overall performance of the converter may
degrade.
Sample Clock Driver
In order to ensure rated performance of the HI5767, the duty
cycle of the sample clock should be held at 50% ±5%. It must
also have low phase noise and operate at standard TTL levels.
It can be difficult to find a low phase noise generator that will
provide a 60MHz squarewave at TTL logic levels.
Consequently, the HI5767EVAL2 evaluation board is
designed with a logic inverter (U5) acting as a voltage
comparator to generate the sampling clock for the HI5767
when a sinewave (<±1.5V) is applied to the AC-coupled, 50Ω
terminated CLK input through SMA type RF connector, J2,
of the evaluation board. The sample clock sinewave is AC
coupled into the input of the inverter and a discrete bias tee
is used to bias the sinewave around the trigger level of the
inverter’s input. A potentiometer (VR2) varies the DC bias
voltage added to the sinewave input allowing the user to
adjust the duty cycle of the sampling clock to obtain the best
performance from the ADC and to evaluate the effects of
sample clock duty cycle on the performance of the converter.
The trigger level for the sample clock input to the HI5767
TABLE 1. HI5767EVAL2 EVALUATION BOARD POWER SUP-
PLIES
POWER
SUPPLY
NOMINAL
VALUE
CURRENT
(TYP)
FUNCTION(S)
SUPPLIED
+5VAIN 5.0V ±5% 6mA External Reference
Voltage Operational
Amplifier, Bandgap
Reference
-5VAIN -5.0V ±5% 5mA External Reference
Voltage Operational
Amplifier
+5VA1IN 5.0V ±5% 50mA A/D AV
CC
+5VDIN 5.0V ±5% 63mA Sample Clock
Generation
+5VD1IN 5.0V ±5% 20mA A/D DV
CC1
+5VD2IN 3.0V ±10% 5mA A/D DV
CC2
Application Note 9762
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

HI5767EVAL2

Mfr. #:
Buy HI5767EVAL2
Manufacturer:
Renesas / Intersil
Description:
Data Conversion IC Development Tools HI5767 HI FREQUENCY EVALUATION PLATFORM
Lifecycle:
New from this manufacturer.
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