DATA SHEET • SMP1304-085LF SURFACE MOUNT PIN DIODE
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4 June 13, 2013 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201683F
Figure 5. SMP1304-085LF Electrically Equivalent Circuit
The effects of these parasitic series inductances are negligible,
since they add a very small insertion loss to the shunt PIN but
have no effect on the isolation that the diode produces when it is
forward biased.
A cross section of the suggested printed circuit board design is
shown in Figure 6. The via shown in this view is critical, both for
electrical performance and for thermal performance. It is
recommended that several vias should be placed under the entire
footprint of the exposed paddle (pin 2) to minimize both electrical
inductance to the system ground and thermal resistance to the
system heat sink.
A Transmit/Receive Switch Design
A T/R switch incorporating a pair of SMP1304-085LF PIN diodes is
shown in Figure 7.
The circuit is based on a quarter wave design using two shunt-
connected SMP1304-085LF diodes. In the transmit state, Bias 1 is
set at 0 mA and Bias 2 is set at 50 mA. Under these conditions,
D1 is held out of conduction so its impedance remains high and a
very small insertion loss is introduced to the path between the
transmitter port and the antenna port.
D2 is forced into conduction, which lowers its series resistance
towards its minimum value of <1 Ω. In this state, energy that
propagates from either the transmitter port or the antenna port is
reflected, which isolates the receiver port from the remainder of
the circuit.
The quarter wave line connected between D2 and the antenna
port transforms the very low impedance of the diode to a very
high impedance looking from the antenna port towards the receive
port. This produces minimal insertion loss in the transmitter-to-
antenna path.
