LTC3824
7
3824fh
For more information www.linear.com/LTC3824
pin FuncTions
GND (Pin 1, Exposed Pad Pin 11): Ground. Exposed pad
must be soldered to PCB with expanded metal trace for
rated thermal performance.
SYNC/MODE (Pin 2): Synchronization Input and Burst
Mode Operation Enable/Disable. If this pin is left open
or pulled higher than 2V, Burst Mode operation will be
enabled at light load and the typical threshold of entering
Burst Mode operation is one third of current limit. If this
pin is grounded or the synchronization pulse is present
with a frequency greater than 20kHz then Burst Mode
operation is disabled and the LTC3824 goes into pulse
skipping at light loads. To synchronize the LTC3824, the
duty cycle of the synchronizing pulse can range from 10%
to 70% and the synchronizing frequency has to be higher
than the programmed frequency.
R
SET
(Pin 3): A resistor from R
SET
to ground sets the
LTC3824 switching frequency.
V
C
(Pin 4): The Output of the voltage error amplifier gm
and the control signal of the current mode PWM control
loop. Switching starts at 0.7V, and higher V
C
corresponds
to higher inductor current. When V
C
is pulled below 25mV,
the LTC3824 goes into micropower shutdown.
V
FB
(Pin 5): Error Amplifier Inverting Input. A resistor
divider to this pin sets the output voltage. When V
FB
is
less than 0.5V, the switching frequency will fold back to
50kHz to reduce the minimum on-cycle.
SS (Pin 6): Soft-Start Pin. A capacitor on this pin sets
the output ramp-up rate. The typical time for SS to
reach the programmed level is (C 0.8V)/5µ
A
. Connect
a 1MΩ to 10MΩ resistor from SS to ground to reset
the soft-start capacitor if shutdown mode is used.
SENSE (Pin 7): Current Sense Input Pin. A sense re-
sistor, R
S
, from V
IN
to SENSE sets the current limit to
100mV/R
S
.
V
CC
(Pin 8): Chip Power Supply. Power supply bypass-
ing is required.
GATE (Pin 9): Gate Drive for The External P-channel
MOSFET. Typical peak drive current is 2.5A and the drive
voltage is clamped to 8V when V
CC
is higher than 9V.
CAP (Pin 10): A Low ESR Capacitor of at Least 0.1µF is
required from this pin to V
CC
to bypass the internal regula-
tor for biasing the gate driver circuitry.
LTC3824
8
3824fh
For more information www.linear.com/LTC3824
block DiagraM
applicaTions inForMaTion
Operation
The LTC3824 is a constant frequency current mode buck
controller with programmable switching frequency up to
600kHz.
Referring to the Block Diagram, the LTC3824’s basic
functions include a transconductance amplifier gm to
regulate the output voltage and control the current mode
PWM current loop, the necessary logic to control the
PWM switching cycles, a high speed gate driver to drive
an external high power P-channel MOSFET and a voltage
regulator to bias the gate driver circuit.
In normal operation each switching cycle starts with switch
turn-on and the inductor current is sampled through the
current sense resistor. This current is amplified and then
compared to the error amplifier output V
C
to turn the
switch off. Voltage loop regulates the output voltage to
the programmed level through the output resistor divider
and the error amplifier. Amplifier E1 regulates the gate
drive low to approximately 8V below V
CC
for V
CC
higher
than 9V, and C
CAP
stabilizes the voltage. Note that when
V
CC
is lower than 9V, gate drive high will be within 0.5V
of V
CC
and gate drive low within 1V of ground.
Important features include shutdown, current limit, soft-
start, synchronization and low quiescent current.
+
3824 BD
+
50KHz FOLDBACK
SYNC DISABLE
Burst Mode
OPERATION
CONTROL
OSC
S
Q
2V
2.5V1.8V
100k
Burst Mode
DISABLE
R
0.025V
V
REF
0.8V
2.5V
5µA
V
C
SS
SHUTDOWN
1.5V
GND
1.1V
SYNC/
MODE
R
SET
R
FREQ
+
+
+
+
+
+
+
+
+
+
+
+
+
SS
+
C2
C
CAP
0.1µF
CAP
Q1
M1
8V
B1
0.5V
FB
RF2
RF1
R
S
GATE
Y5
L
C
OUT
V
OUT
V
IN
Y6
Y2
GM
R1
2k
C1
470pF
C
SS
0.1µF
D6
SLOPE
COMP
D7
D4
D1
E1
V
CC
M2
0.3µA
Y1
OR1
SENSE
0.1V
50pF
PWM
V
REF
REFERENCE
+
1
6
+
+
100k
250k
LTC3824
9
3824fh
For more information www.linear.com/LTC3824
applicaTions inForMaTion
Burst Mode Operation
The LTC3824 can be configured for Burst Mode operation
to enhance light load efficiency (only 40µA quiescent cur-
rent) and extend battery run time by leaving the SYNC/
MODE pin open or pulling it higher than 2V. In this mode,
when output load drops the loop control voltage V
C
also
drops and when V
C
reaches approximately 0.9V at low
duty cycle the LTC3824 goes into sleep mode with the
switch turned off. During sleep mode the output voltage
drops and V
C
rises up. When V
C
goes up to around 70mV
the LTC3824 will turn on the switch and the burst cycle
repeats. If the SYNC/MODE pin is grounded the Burst
Mode operation will be disabled and the LTC3824 skips
cycles at light load.
Oscillation Frequency Setting and Synchronization
The switching frequency of the LTC3824 can be set up to
600kHz by a resistor, R
FREQ
, from the R
SET
pin to ground.
For 200kHz, R
FREQ
= 392k. See the Switching Frequency
vs R
FREQ
graph in the Typical Performance Characteris-
tics section. With a 100ns one-shot timer on-chip, the
LTC3824
provides flexibility on the sync pulse width. The
sync pulse threshold voltage level is about 1.2V.
Short-Circuit Protection
In normal operation when the output voltage is in regulation,
V
FB
is regulated to 0.8V. If the output is shorted to ground
and V
FB
drops below 0.5V the switching frequency will be
reduced to 50kHz to allow the inductor current to discharge
and prevent current runaway. Note that synchronization
is enabled only when V
FB
is above 0.5V.
Soft-Start
During soft-start, the voltage on the SS pin (V
SS
) is the
reference voltage that controls the output voltage and the
output ramps up following V
SS
. The effective range of V
SS
is from 0V to 0.8V. The typical time for the output to reach
the programmed level is:
t
SS
=
C
SS
0.8V
5μA
where C
SS
is the capacitor connected from the SS pin to
GND.
If shutdown mode will be invoked after startup, it is
recommended to connect a 1MΩ to 10MΩ resistor from
SS to ground to reset the SS capacitor during shutdown.
This ensures proper soft-start operation when exiting
shutdown mode.
Overvoltage Protection
To achieve good output regulation in Burst Mode operation,
an overvoltage comparator, OVP, with a threshold adap
-
tive to the V
C
voltage is used to monitor the FB voltage.
In Burst Mode operation with low V
C
voltage, the OVP
threshold is approximately 2% above V
REF
and the V
REF
is also shifted lower by 2% to contain the output ripple
and to keep output regulation constant. As output load
increases, OVP threshold increases with V
C
voltage to up
to 8% above V
REF
.
Shutdown Mode Quiescent Current
When the V
C
pin is pulled down below 25mV the LTC3824
goes into micropower shutdown mode and only draws 7µA.
For proper operation, shutdown mode should not be
engaged again too soon after exiting shutdown mode.
This minimum time is a function of C
SS
and is calculated
by t
MIN
= 5.5e5C
SS
. For example, if C
SS
=0.1μF, then
a minimum of 55ms must elapse after exiting shutdown
before engaging it again.
Output Voltage Programming
With a 0.8V feedback reference voltage, V
REF
, the output
voltage, V
OUT
, is programmed by a resistor divider as
shown in the Block Diagram.
V
OUT
= 0.8V (1+R
F1
/R
F2
)
Current Sense Resistor R
S
and Current Limit
The maximum current the LTC3824 can deliver is deter-
mined by:
I
OUT(MAX)
= 100mV/R
S
– I
RIPPLE
/2
where 100mV is the internal 100mV threshold across V
CC
and V
SENSE
, and I
RIPPLE
is the inductor peak-to-peak ripple
current. R
S
should be placed very close to the power switch
with very short traces. Good kelvin sensing is required for
accurate current limit.

LTC3824MPMSE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators High Voltage Step-Down Controller With 40uA Quiescent Current
Lifecycle:
New from this manufacturer.
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