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CY7C1011CV33-10BAJXE

P1-P3P4-P6P7-P9P10-P12P13-P15
CY7C1011CV33 Automotive
Document Number: 001-86374 Rev. *C Page 7 of 15
Switching Waveforms
Figure 3. Read Cycle No. 1 (Address Transition Controlled)
[11, 12]
Figure 4. Read Cycle No. 2 (OE Controlled)
[12, 13]
PREVIOUS DATA VALID DATA VALID
RC
t
AA
t
OHA
tRC
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZBE
t
PD
t
DBE
t
LZBE
t
HZCE
HIGH
IMPEDANCE
I
CC
I
SB
OE
CE
ADDRESS
DATA OUT
V
CC
SUPPLY
BHE
,BLE
CURRENT
Notes
11. Device is continuously selected. OE
, CE, BHE, and/or BLE = V
IL
.
12. WE
is HIGH for read cycle.
13. Address valid prior to or coincident with CE
transition LOW.
CY7C1011CV33 Automotive
Document Number: 001-86374 Rev. *C Page 8 of 15
Figure 5. Write Cycle No. 1 (CE Controlled)
[14, 15]
Figure 6. Write Cycle No. 2 (BLE or BHE Controlled)
Switching Waveforms (continued)
t
HD
t
SD
t
SCE
t
SA
t
HA
t
AW
t
PWE
t
WC
BW
t
DATA IO
ADDRESS
CE
WE
BHE,BLE
t
HD
t
SD
t
BW
t
SA
t
HA
t
AW
t
PWE
t
WC
t
SCE
DATA I/O
ADDRESS
BHE
,BLE
CE
WE
Notes
14. Data I/O is high impedance if OE,
BHE, and/or BLE = V
IH
.
15. If CE
goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
CY7C1011CV33 Automotive
Document Number: 001-86374 Rev. *C Page 9 of 15
Figure 7. Write Cycle No. 3 (WE Controlled, LOW)
Switching Waveforms (continued)
t
HD
t
SD
t
SCE
t
HA
t
AW
t
PWE
t
WC
t
BW
t
SA
t
LZWE
t
HZWE
DATA I/O
ADDRESS
CE
WE
BHE,BLE
P1-P3P4-P6P7-P9P10-P12P13-P15

CY7C1011CV33-10BAJXE

Mfr. #:
Buy CY7C1011CV33-10BAJXE
Manufacturer:
Cypress Semiconductor
Description:
SRAM 2Mb 10ns3.3V 128Kx16 Fast Async SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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