ADG1207YRUZ-REEL7 Datasheet ADG1207YRUZ, ADG1206YRUZ, ADG1206YRUZ-REEL7 | P7-P9

Data Sheet ADG1206/ADG1207

Rev. C | Page 7 of 20

ABSOLUTE MAXIMUM RATINGS

T

A

= 25°C, unless otherwise noted.

Table 3.

Parameter Rating

V

DD

to V

SS

35 V

V

DD

to GND −0.3 V to +25 V

V

SS

to GND +0.3 V to −25 V

Analog Inputs

1

V

SS

− 0.3 V to V

DD

+ 0.3 V

or 30 mA, whichever

occurs first

Digital Inputs

1

GND − 0.3 V to V

DD

+ 0.3 V

or 30 mA, whichever

occurs first

Continuous Current, S or D 30 mA

Peak Current, S or D (Pulsed at 1 ms,

10% Duty Cycle Maximum)

100 mA

Operating Temperature Range

Industrial (Y Version) –40°C to +125°C

Storage –65°C to +150°C

Junction Temperature 150°C

Thermal Impedance

28-Lead TSSOP

θ

JA

97.9°C/W

θ

JC

14°C/W

32-Lead LFCSP

θ

JA

27.27°C/W

Reflow Soldering Peak Temperature

(RoHS Compliant)

260(+0/−5)°C

1

Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should

be limited to the maximum ratings given.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

Only one absolute maximum rating may be applied at any

one time.

ESD CAUTION

ADG1206/ADG1207 Data Sheet

Rev. C | Page 8 of 20

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1

V

DD

28

D

2

NIC

27

V

SS

3

NIC

26

S8

4

S16

25

S7

5

S15

24

S6

6

S14

23

S5

7

S13

22

S4

8

S12

21

S3

9

S11

20

S2

10

S10

19

S1

11

S9

18

EN

12

G

ND

17

A0

13

NIC

16

A1

14

A3

15

A2

ADG1206

TOP VIEW

(Not to Scale)

NIC = NO INTERNAL CONNECTION

06119-003

Figure 3. 28-Lead TSSOP Pin Configuration (ADG1206)

S16

S15

S14

S13

S12

S11

S10

S9

S8

S7

S6

S5

S4

S3

S2

S1

GND

A3

A2

NIC

A1

A0

EN

NIC

V

DD

NIC

D

NIC

V

SS

06119-004

1. NIC = NO INTERNAL CONNECTION.

2. THE EXPOSED PAD MUST BE TIED

TO THE SUBSTRATE, V

SS

.

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

ADG1206

TOP VIEW

(Not to Scale)

Figure 4. 32-Lead LFCSP Pin Configuration (ADG1206)

Table 4. ADG1206 Pin Function Descriptions

Pin No.

TSSOP LFCSP Mnemonic Description

1 31 V

DD

Most Positive Power Supply Potential.

2, 3, 13

12, 13, 26, 27,

28, 30, 32

NIC No Internal Connection.

4 1 S16 Source Terminal 16. Can be an input or an output.

5 2 S15 Source Terminal 15. Can be an input or an output.

6 3 S14 Source Terminal 14. Can be an input or an output.

7 4 S13 Source Terminal 13. Can be an input or an output.

8 5 S12 Source Terminal 12. Can be an input or an output.

9 6 S11 Source Terminal 11. Can be an input or an output.

10 7 S10 Source Terminal 10. Can be an input or an output.

11 8 S9 Source Terminal 9. Can be an input or an output.

12 9 GND Ground (0 V) Reference.

14 10 A3 Logic Control Input.

15 11 A2 Logic Control Input.

16 14 A1 Logic Control Input.

17 15 A0 Logic Control Input.

18 16 EN

Active High Digital Input. When this pin is low, the device is disabled and all switches are

turned off. When this pin is high, the Ax logic inputs determine which switch is turned on.

19 17 S1 Source Terminal 1. Can be an input or an output.

20 18 S2 Source Terminal 2. Can be an input or an output.

21 19 S3 Source Terminal 3. Can be an input or an output.

22 20 S4 Source Terminal 4. Can be an input or an output.

23 21 S5 Source Terminal 5. Can be an input or an output.

24 22 S6 Source Terminal 6. Can be an input or an output.

25 23 S7 Source Terminal 7. Can be an input or an output.

26 24 S8 Source Terminal 8. Can be an input or an output.

27 25 V

SS

Most Negative Power Supply Potential. In single-supply applications, this pin can be

connected to ground.

28 29 D Drain Terminal. Can be an input or an output.

Not

applicable

0 EPAD Exposed Pad. The exposed pad must be tied to the substrate, V

SS

.

Data Sheet ADG1206/ADG1207

Rev. C | Page 9 of 20

Table 5. ADG1206 Truth Table

A3 A2 A1 A0 EN On Switch

X X X X 0 None

0 0 0 0 1 1

0 0 0 1 1 2

0 0 1 0 1 3

0 0 1 1 1 4

0 1 0 0 1 5

0 1 0 1 1 6

0 1 1 0 1 7

0 1 1 1 1 8

1 0 0 0 1 9

1 0 0 1 1 10

1 0 1 0 1 11

1 0 1 1 1 12

1 1 0 0 1 13

1 1 0 1 1 14

1 1 1 0 1 15

1 1 1 1 1 16

ADG1207YRUZ-REEL7

ADG1207YRUZ-REEL7

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