MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS AND GENERAL OR-ING CIRCUITS
MP6914 Rev. 1.01 www.MonolithicPower.com 8
5/28/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
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APPLICATION INFORMATION
Loss Calculation
The MP6914 provide solutions for photovoltaic
applications, designed to increase system
efficiency by implementing a bypass function
through a 5.3mΩpower MOSFET transistor
instead of a conventional Schottky diode.
MP6914 should be connected in parallel to the
cell string which is intended to be protected. In
normal work this string produce enery with a
voltage
KA
V . In normal work MP6914 comsumes
a power determined by:
6
LOSS KA KA
P(W)V(V)*I(A)*10
Where
KA
I Is the reverse current (see Figure 3),
typically <3μA, so
LOSS
P is very small.
When this cell string is shaded to act as a load of
other cells, MP6914 will turn on the internal
MOSFET to prevent hot-spot issue. Now
KA
I is
the negative forward current
F
I (typically 0~10A),
equal to current in the real load of PV cells.
KA
V
is the negative forward voltage
F
V .if
F
I is below
5A,
F
V is clamped to about 30mV, otherwise can
be found in Figure “Forward Voltage vs. Forward
Current”. Then substituting
F
V and
F
I into
previous equation can calculate out the loss in
this case.
LOSS
P (W),
JA
(45-65
o
C/W), ambient temperature
a
T (
o
C) and maximum allowed junction
temperature (150
o
C) decide the maximum
F
I (A).
In common case, this relation can be expressed:
FaJAF
I (150 T )/( * V * 0.001)
Where
F
V in mV, and can be found in the
anterior Figure “Forward Voltage vs. Forward
Current”, and the maximum
F
I is sketched in
Figure “Maximum Forward Current vs. Ambient
Temperature”.
Component Selection
A small capacitor is needed to keep a clean
voltage for V
DD
pin, 0.1μF is enough. A resistor of
1kΩ is needed between V
D
and K pins in order to
prevent noise from PV cells line. This resistor
doesn’t consume power.
PCB Layout Guide
As usually the current flowing into A pin through
K pin Is big, the copper plane connected to these
pins is recommended as big as possible, as
shown in the figures below:
Top Layer
Bottom Layer