IR1152STRPBF

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

IR1152S

www.irf.com 4

© 2011 International Rectifier

Internal Voltage Reference Section

Parameters Symbol Min. Typ. Max. Units Remarks

Reference Voltage V

REF

4.9 5 5.1 V

Regulation Voltage on VFB pin,

T

AMB

=25°C

Line Regulation R

REG

10 20 mV 14V < V

CC

< 17V

Temp Stability

T

STAB

0.4 % -25°C < T

AMB

< 125°C

Total Variation

ΔV

TOT

4.85 5.1 V Line & Temperature

Voltage Error Amplifier Section

Parameters Symbol Min. Typ. Max. Units Remarks

Transconductance g

m

35 49 59

µS

30

44

58 T

AMB

=25°C

Source Current (Normal

Mode)

I

OVEA(SRC)

17 80

µA

-25°C < T

AMB

< 125°C

-58 -44 -30 T

AMB

=25°C

Sink Current (Normal Mode)

I

OVEA(SNK)

-80 -17

µA

-25°C < T

AMB

< 125°C

Soft Start Delay Time

(calculated)

t

SS

60 msec

R

GAIN

=1.1kΩ, C

ZERO

=0.56μF,

C

POLE

=10nF

V

COMP

Voltage (Fault) V

COMP FLT

1 1.4 V @100uA steady state

Effective V

COMP

voltage

V

COMP EFF

4.7 4.9 5.1 V

VFB Input Bias Current

I

FB(Bias)

-0.2

µA

V

FB

=4.9V

Output Low Voltage

V

OL

0.25 V

Output High Voltage

V

OH

5 5.4 V

V

COMP

Start Voltage

V

COMP

START

260 375 485 mV

IR1152S

www.irf.com 5

© 2011 International Rectifier

Current Amplifier Section

Parameters Symbol Min. Typ. Max. Units Remarks

DC Gain

g

DC

2.65 3.1 3.55 V/V

Corner Frequency

f

C

5 kHz Average Current Mode, Note 1

Input Offset Voltage

V

IO

4 16 mV Note 1

ISNS Input Bias Current

I

ISNS(Bias)

-57 -13

µA

V

FB

=0V, V

ISNS

=-1V

Blanking Time

T

BLANK

170 320 470 ns

Gate Driver Section

Parameters Symbol Min. Typ. Max. Units Remarks

Gate Low Voltage V

GLO

0.8 V I

GATE

= 200mA

12 13 14 V

CC

=17V, Internally Clamped

Gate High Voltage V

GTH

10

V

V

CC

=11.5V

25 ns C

LOAD

= 1nF, VCC=15V

Rise Time t

r

60 ns C

LOAD

= 4.7nF, VCC=15V

35 ns C

LOAD

= 1nF, VCC=15V

Fall Time t

f

65 ns C

LOAD

= 4.7nF, VCC=15V

Output Peak Current I

OPK

750 mA C

LOAD

= 4.7nF, VCC=15V, Note 1

Gate Voltage at Fault

V

G fault

0.08 V I

GATE

= 20mA

Note 1: Guaranteed by design, but not tested in production

IR1152S

www.irf.com 6

© 2011 International Rectifier

Block Diagram

V

REF

VFB

COMP

V

COMP

Discharge

V

OLP

OPEN LOOP

Comparator

Q

S

R

ISNS

g

DC

V

ISNS

COM

VCC

GATE

V BIAS

V BIAS

V BIAS

V BIAS

V BIAS

V

BOP(EN)

V

BOP

V BIAS

V

ISNS(PK)

+

-

BOP

VBIAS

OVP/EN

V

SLEEP

SLEEP

(POWER OFF)

VBIAS

BOP

INTEGRATED

RAMP +

OSCILLATOR

V BIAS

OLP

V

COMP START

BROWN OUT

Comparator

VBIAS

Voltage Error

Amplifier

ENABLE

Comparator

Current

Amplifier

V

OVP

V

OVP(RST)

OVP (OVP)

VBIAS

OVP (VFB)

V

m

V

M

0

OVP (OVP)

Comparator

OVP (VFB)

Comparator

OVP (OVP)

OVP (VFB)

UVLO

Block

Bias & Internal

References

UVLO

(POWER OFF)

MAX DUTY

CYCLE LIMIT

STAND-BY

IPK LIMIT

Comparator

V

OVP

V

OVP(RST)

UVLO/SLEEP

f

C

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

IR1152STRPBF

Mfr. #:

Buy IR1152STRPBF

Manufacturer:

Infineon / IR

Description:

Power Factor Correction - PFC OCC PFC Cntrl Fix Frequency

Lifecycle:

New from this manufacturer.

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