889831AK www.icst.com/products/hiperclocks.html REV. A JUNE 16, 2005
4
Integrated
Circuit
Systems, Inc.
ICS889831
LOW SKEW, 1-TO-4
DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V
CC
= 2.5V ± 5%, 3.3V ± 5%; V
EE
= 0V
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
CC
egatloVylppuSevitisoP 573.23.3564.3V
I
EE
tnerruCylppuSrewoP 06Am
ABSOLUTE MAXIMUM RATINGS
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage
to the device. These ratings are stress specifi-
cations only. Functional operation of product at
these conditions or any conditions beyond those
listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may
affect product reliability.
Supply Voltage, V
CC
4.6V (LVPECL mode, V
EE
= 0)
Negative Supply Voltage, V
EE
-4.6V (ECL mode, V
CC
= 0)
Inputs, V
I
(LVPECL mode) -0.5V to V
CC
+ 0.5 V
Inputs, V
I
(ECL mode) 0.5V to V
EE
- 0.5V
Outputs, I
O
Continuous Current 50mA
Surge Current 100mA
Input Current, IN, nIN ±50mA
V
T
Current, I
VT
±100mA
Input Sink/Source, I
REF_AC
± 0.5mA
Operating Temperature Range, TA -40°C to +85°C
Storage Temperature, T
STG
-65°C to 150°C
Package Thermal Impedance, θ
JA
51.5°C/W (0 lfpm)
(Junction-to-Ambient)
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, V
CC
= 2.5V ± 5%, 3.3V ± 5%; V
EE
= 0V
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnI2V
CC
3.0+V
V
LI
egatloVwoLtupnI08.0V
I
HI
tnerruChgiHtupnIV
CC
V=
NI
V564.3=5Aµ
I
LI
tnerruCwoLtupnIV
CC
V,V564.3=
NI
V0=051-Aµ
TABLE 4C. DC CHARACTERISTICS, V
CC
= 2.5V ± 5%, 3.3V ± 5%; V
EE
= 0V
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
R
NI
ecnatsiseRtupnIlaitnereffiD)NIn,NI(TV-ot-NI040506
Ω
V
HI
egatloVhgiHtupnI)NIn,NI(2.1V
CC
V
V
LI
egatloVwoLtupnI)NIn,NI(0V
HI
51.0-V
V
NI
gniwSegatloVtupnI 51.08.2V
V
CA_FER
egatloVecnerefeRV
CC
24.1-V
CC
73.1-V
CC
23.1-V
V
NI_FFID
gniwSegatloVtupnIlaitnereffiD 3.04.3V
I
NI
1ETON;tnerruCtupnI)NIn,NI(53Am
.ngisedybdeetnarauG:1ETON
889831AK www.icst.com/products/hiperclocks.html REV. A JUNE 16, 2005
5
Integrated
Circuit
Systems, Inc.
ICS889831
LOW SKEW, 1-TO-4
DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER
TABLE 4D. LVPECL DC CHARACTERISTICS, V
CC
= 2.375V TO 3.465V; V
EE
= 0V
lobmySretemaraPsnoitidnoCmuminiMlacipyTmumixaMstinU
V
HO
1ETON;egatloVhgiHtuptuOV
CC
521.1-V
CC
500.1-V
CC
539.0-V
V
LO
1ETON;egatloVwoLtuptuOV
CC
598.1-V
CC
87.1-V
CC
76.1-V
V
TUO
gniwSegatloVtuptuO6.00.1V
V
TUO_FFID
gniwSegatloVtuptuOlaitnereffiD2.10.2V
05htiwdetanimretstuptuO:1ETON Ω Vot
CC
.V2-
TABLE 5. AC CHARACTERISTICS, V
CC
= 0V; V
EE
= -3.3V ± 5%, -2.5V ± 5% OR V
CC
= 2.5 ± 5%, 3.3V ± 5%; V
EE
= 0V
lobmySretemaraPnoitidnoCmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuOmumixaMgniwStuptuO Vm0541.2zHG
t
DP
;)laitnereffiD(;yaleDnoitagaporP
1ETON
Vm001:gniwStupnI003534075sp
Vm008:gniwStupnI552073584sp
t
)o(ks4,2ETON;wekStuptuO 03sp
t
)pp(ks4,3ETON;wekStraP-ot-traP 581sp
t
tij
;SMR,rettiJesahPevitiddAreffuB
noitcesrettiJesahPevitiddAotrefer
noitargetnI,zHM25.551
zHM02-zHk21:egnaR
72.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02001052sp
t
S
emiTputeSelbanEkcolCNIn,NIotNE003sp
t
H
emiTdloHelbanEkcolCNIn,NIotNE003sp
tadeziretcarahcsretemarapllA .detonesiwrehtosselnuzHG1
.tniopgnissorctu
ptuolaitnereffidehtottniopgnissorctupnilaitnereffidehtmorfderusaeM:1ETON
.snoitidnocdaollauqehtiwdnaeg
atlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
.stniopssorclaitnereffidtuptuoehttaderusaeM
segat
lovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:3ETON
derusaemerastuptuoeht,e
civedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqehtiwdna
.stniopssorclaitnereffidehtta
.56dradnat
SCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON
889831AK www.icst.com/products/hiperclocks.html REV. A JUNE 16, 2005
6
Integrated
Circuit
Systems, Inc.
ICS889831
LOW SKEW, 1-TO-4
DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER
ADDITIVE PHASE JITTER
Additive Phase Jitter @ 155.52MHz
(12kHz to 20MHz)
= 0.27ps typical
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k 10k 100k 1M 10M 100M
The spectral purity in a band at a specific offset from the funda-
mental compared to the power of the fundamental is called the
dBc Phase Noise.
This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise
power present in a 1Hz band at a specified offset from the fun-
damental frequency to the power value of the fundamental. This
ratio is expressed in decibels (dBm) or a ratio of the power in
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The de-
the 1Hz band to the power in the fundamental. When the re-
quired offset is specified, the phase noise is called a
dBc
value,
which simply means dBm at a specified offset from the funda-
mental. By investigating jitter in the frequency domain, we get a
better understanding of its effects on the desired application over
the entire time record of the signal. It is mathematically possible
to calculate an expected bit error rate given a phase noise plot.
vice meets the noise floor of what is shown, but can actually be
lower. The phase noise is dependant on the input source and
measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB PHASE NOISE dBc/HZ

ICS889831AKLF

Mfr. #:
Manufacturer:
Description:
IC CLK BUFFER 1:4 2.1GHZ 16VFQFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet