Data Sheet AD8209
Rev. C | Page 9 of 16
08461-014
2
3
200mV/DIV
2V/DIV
INPUT
OUTPUT
TIME (2µs/DIV)
Figure 16. Differential Overload Recovery, Rising
08461-013
2
3
200mV/DIV
2V/DIV
INPUT
OUTPUT
TIME (2µs/DIV)
Figure 17. Differential Overload Recovery, Falling
08461-015
3
2
2V/DIV
0.01%/DIV
TIME (20µs/DIV)
Figure 18. Settling Time, Rising
08461-016
3
2
2V/DIV
0.01%/DIV
TIME (20µs/DIV)
Figure 19. Settling Time, Falling
432101234
0
100
200
300
400
500
08461-019
V
OS
(mV)
COUNT
+125°C
+25°C
–40°C
Figure 20. Offset Distribution
COUNT
OFFSET DRIFT (µV/°C)
180
150
120
90
60
30
0
–20 –15 –10 –5 5 10 15 200
08461-020
Figure 21. Offset Drift Distribution
AD8209 Data Sheet
Rev. C | Page 10 of 16
COUNT
1400
1200
1000
800
600
400
200
0
–20
–15
–10
–5 0
GAIN DRIFT (ppm/°C)
5 10 15 20
08461-021
Figure 22. Gain Drift Distribution
Data Sheet AD8209
Rev. C | Page 11 of 16
THEORY OF OPERATION
The AD8209 is a single-supply difference amplifier typically used
to amplify a small differential voltage in the presence of rapidly
changing, high common-mode voltages.
The AD8209 consists of two amplifiers (A1 and A2), a resistor
network, a small voltage reference, and a bias circuit (not shown);
see Figure 23.
The set of input attenuators preceding A1 consist of R
A
, R
B
, and
R
C
, which feature a combined series resistance of approximately
400 kΩ ± 20%. The purpose of these resistors is to attenuate the
input voltage to match the input voltage range of A1. This balanced
resistor network attenuates the common-mode signal by a ratio
of 1/14. The A1 amplifier inputs are held within the power supply
range, even as Pin 1 and Pin 8 exceed the supply or fall below the
common (ground). A reference voltage of 350 mV biases the
attenuator above ground, allowing Amplifier A1 to operate in
the presence of negative common-mode voltages.
The input resistor network also attenuates normal (differential)
mode voltages. Therefore, A1 features a gain of 97 V/V to provide
a total system gain, from ±IN to the output of A1, equal to 7 V / V,
as shown in the following equation:
Gain (A1) = 1/14 (V/V) × 97 (V/V) = 7 V/V
A precision trimmed, 100 kΩ resistor is placed in series with the
output of Amplifier A1. The user has access to this resistor via
an external pin (A1). A low-pass filter can be easily implemented
by connecting A1 to A2 and placing a capacitor to ground (see
Figure 32).
The value of R
F1
and R
F2
is 10 kΩ, providing a gain of 2 V/V for
Amplifier A2. When connecting Pin A1 and Pin A2 together, the
AD8209 provides a total system gain equal to
Total Gain of (A1 + A2) (V/V) = 7 (V/V) × 2 (V/V) = 14 V/V
at the output of A2 (the OUT pin).
The ratios of R
A
, R
B
, R
C
, and R
F
are trimmed to a high level of
precision, allowing a typical CMRR value that exceeds 80 dB. This
performance is accomplished by laser trimming the resistor ratio
matching to better than 0.01%.
OUT
GND
V
S
R
C
R
F
–IN
350mV
+
R
B
R
B
R
A
R
A
R
C
R
F
R
G
R
FILTER
R
M
A1
A2
+IN
A1
A2
+
R
F1
R
F2
08461-025
Figure 23. Simplified Schematic

AD8209WBRMZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Current Sense Amplifiers High VTG Precision
Lifecycle:
New from this manufacturer.
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