AD8209 Data Sheet
Rev. C | Page 14 of 16
GAIN TRIM
Figure 31 shows a method for incremental gain trimming by
using a trim potentiometer and an external resistor, R
EXT
.
The following approximation is useful for small gain ranges:
ΔG ≈ (10 MΩ ÷ R
EXT
)%
For example, using this equation, the adjustment range is ±2%
for R
EXT
= 5 MΩ and ±10% for R
EXT
= 1 MΩ.
GND
NC
–IN
+IN
A1
+V
S
A2
R
EXT
OUT
AD8209
5V
V
DIFF
V
CM
NC = NO CONNECT
08461-033
OUTPUT
GAIN TRIM
20kΩ MIN
+
–
+
–
Figure 31. Incremental Gain Trimming
Internal Signal Overload Considerations
When configuring the gain for values other than 14, the maximum
input voltage with respect to the supply voltage and ground must
be considered because either the preamplifier or the output buffer
reaches its full-scale output (V
S
− 0.1 V) with large differential
input voltages. The input of the AD8209 is limited to (V
S
− 0.1) ÷
7 for overall gains of ≤7 because the preamplifier, with its fixed
gain of 7 V/V, reaches its full-scale output before the output
buffer. For gains greater than 7, the swing at the buffer output
reaches its full scale first and then limits the AD8209 input to
(V
S
− 0.1) ÷ G, where G is the overall gain.
LOW-PASS FILTERING
In many transducer applications, it is necessary to filter the signal
to remove spurious high frequency components, including noise,
or to extract the mean value of a fluctuating signal with a peak-
to-average ratio (PAR) greater than unity. For example, a full-wave
rectified sinusoid has a PAR of 1.57, a raised cosine has a PAR
of 2, and a half-wave sinusoid has a PAR of 3.14. Signals with
large spikes may have PARs of 10 or more.
When implementing a filter, the PAR should be considered so
that the output of the AD8209 preamplifier (A1) does not clip
before A2; otherwise, the nonlinearity would be averaged and
appear as an error at the output. To avoid this error, both amplifiers
should clip at the same time. This condition is achieved when the
PAR is no greater than the gain of the second amplifier (2 for
the default configuration). For example, if a PAR of 5 is expected,
the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways by using
the features provided by the AD8209. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output
of A1 is connected to the input of A2 via the internal 100 kΩ
resistor by tying Pin 3 to Pin 4 and adding a capacitor from this
node to ground, as shown in Figure 32. If a resistor is added
across the capacitor to lower the gain, the corner frequency
increases; therefore, gain should be calculated using the parallel
sum of the resistor and 100 kΩ.
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8209
5V
V
DIFF
V
CM
C
F
NC = NO CONNECT
08461-034
OUTPUT
f
C
=
1
2πC10
5
C IN FARADS
+
–
+
–
Figure 32. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor
If the gain is raised using a resistor, as shown in Figure 30, the
corner frequency is lowered by the same factor as the gain is raised.
Therefore, using a resistor of 200 kΩ (for which the gain would
be doubled), results in a corner frequency scaled to 0.796 Hz µF
(0.039 µF for a 20 Hz corner frequency).
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8209
5V
V
DIFF
V
CM
C
C
NC = NO CONNECT
08461-035
OUTPUT
f
C
(Hz) = 1/C(
µF)
255kΩ
+
–
+
–
Figure 33. Two-Pole, Low-Pass Filter
A two-pole filter with a roll-off of 40 dB/decade can be
implemented using the connections shown in Figure 33. This
configuration is a Sallen-Key form based on a ×2 amplifier. It is
useful to remember that a two-pole filter with a corner frequency
of f
2
and a single-pole filter with a corner frequency of f
1
have
the same attenuation, that is, 40 log (f
2
/f
1
), as shown in Figure 34.
Using the standard resistor value shown in Figure 33 and capacitors
of equal values, the corner frequency is conveniently scaled to
1 Hz µF (0.05 µF for a 20 Hz corner frequency). A maximal flat
response occurs when the resistor is lowered to 196 kΩ, scaling
the corner frequency to 1.145 Hz µF. The output offset is raised
by approximately 5 mV (equivalent to 250 µV at the input pins).
