LT6220/LT6221/LT6222
16
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For more information www.linear.com/LT6220/LT6221/LT6222
Typical applicaTions
As the signal level increases though, the output of the op
amp goes more negative. At 12.5µA of photodiode cur-
rent, the
100
gain dictates that the LT6220 output will
be about 1.25V below ground. However, at that point the
emitter of Q2 will be at ground, and the base of Q1 will
be 1V below ground. Thus, Q1 turns on and photodiode
current starts to flow through R2. The transimpedance gain
is therefore now reduced to R1||R2, or about 3.1kΩ. The
circuit response is shown in Figure 3. Note the smooth
transition between the two operating gains, as well as
the linearity.
Differential-In/Differential-Out Amplifier
The circuit of Figure 6 shows the LT6222 applied as a
buffered differential-in differential-out amplifier with a gain
of 2. Op amps A and B are configured as simple unity-gain
buffers, offering high input impedance to upstream cir
-
cuitry. Resistors
R1 and R2 perform an averaging function
on the common mode input voltage and R3 attenuates it
by a factor of 2/3 and references it to the voltage source
V
OCM
. The resultant voltage, V
MID
= 2/3 • V
ICM
, is placed
at the noninverting inputs of op amps C and D. The other
four
resistors set gains of +3 from the noninverting input
and –2 through the inverting path. Thus the output voltage
of the upper path is:
OUT = 3 •(2/3 • V
ICM
+ 1/3 • V
OCM
) – 2
• (V
ICM
+ V
DIFF
/2)
= 2V
ICM
+ V
OCM
– 2V
ICM
– V
DIFF
= V
OCM
– V
DIFF
Figure 4. 3V, 1MHz, 4th Order Butterworth Filter
Figure 5. Frequency Response of Filter
Figure 3. Stepped-Gain Photodiode Amplifier Response
Single 3V Supply, 1MHz, 4th Order Butterworth Filter
The circuit shown in Figure 4 makes use of the low voltage
operation and the wide bandwidth of the LT6221 to create
a DC accurate 1MHz 4th order lowpass filter powered from
a 3V supply. The amplifiers are configured in the inverting
mode for the lowest distortion and the output can swing
rail-to-rail for maximum dynamic range. Figure 5 displays
the frequency response of the filter. Stopband attenuation
is greater than 100dB at 50MHz.
+
1/2 LT6221
47pF
220pF
V
IN
V
S
/2
909Ω
2.67k
909Ω
+
1/2 LT6221
22pF
V
OUT
470pF
622012 F04
1.1k
2.21k
3V
1.1k
FREQUENCY (Hz)
80
GAIN (dB)
40
0
–100
60
20
20
1k 100k 1M 10M
100M
622012 F05
–120
10k
PHOTO
CURRENT
100µA/DIV
V
OUT
0.5V/DIV
5µs/DIV
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LT6220/LT6221/LT6222
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For more information www.linear.com/LT6220/LT6221/LT6222
Typical applicaTions
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
and the output of the lower path is:
+OUT = 3 •(2/3 • V
ICM
+ 1/3 • V
OCM
) – 2
• (V
ICM
– V
DIFF
/2)
= 2V
ICM
+ V
OCM
– 2V
ICM
+ V
DIFF
= V
OCM
+ V
DIFF
Note that the input common mode voltage does not appear
in the output as either a common mode or a difference
mode term. However the voltage V
OCM
does appear in
the output terms, and with the same polarity, so it sets
up the output DC level. Also, the differential input voltage
V
DIFF
appears fully at both outputs with opposite polarity,
giving rise to the effective differential gain of 2. Calcula-
tions show that using 1% resistors gives worst-case input
common mode feedthrough better than –31dB, whether
looking at the output common mode or difference mode.
Considering the 6dB of gain, worst-case common mode
rejection ratio is 37dB. (Remember this is assuming 1%
resistors. Of course, this can be improved with more pre
-
cise resistors.) Results achieved on the bench with typical
1% resistors showed 67dB of CMRR at low frequency and
40dB CMRR at 1MHz. Gains other than 2 can be achieved
by setting R3 = α (R1||R2), R5 = α R4 and R7 = α R6
where gain = α.
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 0509 REV C
0.25 ±0.05
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1.65 ±0.05
(2 SIDES)2.10 ±0.05
0.50
BSC
0.70 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
LT6220/LT6221/LT6222
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For more information www.linear.com/LT6220/LT6221/LT6222
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S5 TSOT-23 0302
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)

LT6220IS5#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers 1x 60MHz, 20V/ s L Pwr, R2R In & Out Pr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union