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HMC520ALC4TR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
Data Sheet HMC520A
Rev. 0 | Page 3 of 28
SPECIFICATIONS
LO = 15 dBm, IF = 100 MHz, RF = −10 dBm, T
A
= 25°C, unless otherwise noted. All measurements were made as a downconverter with
the lower sideband selected (high-side LO) and an external 90° IF hybrid at the IF ports, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
RF RANGE
6
10
GHz
LO INPUT FREQUENCY RANGE 6 10 GHz
IF FREQUENCY RANGE DC 3.5 GHz
LO AMPLITUDE 15 dBm
6 GHz to 10 GHz PERFORMANCE
Conversion Loss 8 10 dB
Noise Figure 8.5 dB
Input Third-Order Intercept (IP3) 19 dBm
Input Power for 1dB Compression (P1dB) 10.5 dBm
Image Rejection 19 23 dBc
LO to RF Isolation
Taken without external 90° IF hybrid
38
43
dB
LO to IF Isolation
Taken without external 90° IF hybrid
25
dB
Phase Balance Taken without external 90° IF hybrid 5 Degree
Amplitude Balance Taken without external 90° IF hybrid 0.3 dB
7.1 GHz to 8.5 GHz PERFORMANCE
Conversion Loss 7.7 9.5 dB
Noise Figure 8 dB
Input Third-Order Intercept (IP3) 19 dBm
Input Power for 1dB Compression (P1dB) 10 dBm
Image Rejection 21 25 dBc
LO to RF Isolation Taken without external 90° IF hybrid 38 43 dB
LO to IF Isolation Taken without external 90° IF hybrid 25 dB
Phase Balance Taken without external 90° IF hybrid 4 Degree
Amplitude Balance Taken without external 90° IF hybrid 0.3 dB
HMC520A Data Sheet
Rev. 0 | Page 4 of 28
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
RF Input Power 20 dBm
LO Input Power 27 dBm
IF1 and IF2 Input Power 20 dBm
IF DC Current 12 mA
Maximum Peak Reflow Temperature
1
260°C
Continuous Power Dissipation, P
DISS
(T
A
= 85°C,
Derate 4.44 mW/°C Above 85°C)
400 mW
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature Range (Soldering 60 sec) −65°C to +150°C
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM) 750 V (Class 1B)
Field Induced Charged Device Model (FICDM) 1250 V (Class C3)
1
See the Ordering Guide section.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Table 3. Thermal Resistance
Package Type θ
JA
θ
JC
1
Unit
E-24-1
2
175°C 225 °C/W
1
θ
JC
is the thermal resistance, junction to case (°C/W).
2
See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance (PCB with 3 × 3 vias).
ESD CAUTION
Data Sheet HMC520A
Rev. 0 | Page 5 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
13
1
3
4
2
7
NIC
NIC
GND
RF
5
6
GND
NIC
NIC
14
GND
15
LO
16
GND
17
NIC
18
NIC
NIC
8
NIC
9
IF1
10
NIC
11
IF2
12
19
GND
NI
20
NI
21
NI
22
NI
23
NI
24
NI
HMC520A
TOP VIEW
(Not to Scale)
NOTES
1. NIC = NOT INTERNALY CONNECTED.
2. EXPOSED PAD. THE EXPOSED PAD
MUST BE CONNECTED TO PIN GND.
13605-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 2, 6 to 8, 10, 13,
17 to 24
NIC Not Internally Connected.
3, 5, 12, 14, 16 GND Ground. See Figure 7 for the GND interface schematic.
4 RF RF Port. This pin is ac-coupled internally and matched to 50 Ω. See Figure 3 for the RF interface schematic.
9, 11 IF1, IF2
First and Second Quadrature Intermediate Frequency Input Pins. For applications that do not require
operation to dc, use an off-chip dc blocking capacitor. For applications that require operation to dc,
these pins must not source or sink more than 12 mA of current because the device may not function
or possible device failure may result. See Figure 5 and Figure 6 for the IF1 and IF2 interface schematics.
15 LO
Local Oscillator Port. This pin is dc-coupled and matched to 50 Ω. See Figure 4 for the LO interface
schematic.
EPAD Exposed Pad. The exposed pad must be connected to pin GND.
INTERFACE SCHEMATICS
RF
13605-003
Figure 3. RF Interface Schematic
L
O
13605-004
Figure 4. LO Interface Schematic
IF1
13605-005
Figure 5. IF1 Interface Schematic
IF2
13605-006
Figure 6. IF2 Interface Schematic
G
ND
13605-007
Figure 7. GND Interface Schematic
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

HMC520ALC4TR

Mfr. #:
Buy HMC520ALC4TR
Manufacturer:
Analog Devices / Hittite
Description:
RF Mixer GaAs MMIC I/Q Mixer 6-10 GHz
Lifecycle:
New from this manufacturer.
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