ZL40203 Data Sheet
4
Microsemi Corporation
Change Summary
Page Item Change
7 Figure 4 Changed text to indicate the circuit is not recommended for
VDD_dr
iver=2.5V.
Below are the changes from the November 2012 issue to the February 2013 issue:
ZL40203 Data Sheet
5
Microsemi Corporation
1.0 Package Description
The device is packaged in a 16 pin QFN
14
16
6
4
2
out3_n
vdd
out3_p
vt
clk_p
vdd
gnd
out0_n
out2_n
out2_p
out1_n
8
12 10
out1_p
clk_n
ctrl
out0_p
gnd
Figure 2 - Pin Connections
ZL40203 Data Sheet
6
Microsemi Corporation
2.0 Pin Description
Pin # Name Description
1, 4 clk_p, clk_n, Differential Input (Analog Input). Differential (or singled ended) input signals. For all
input signal configuration see section 3.1, “Clock Inputs“ on page 6
15,14,
12, 11,
10, 9,
7, 6
out0_p, out0_n
out1_p, out1_n
out2_p, out2_n
out3_p, out3_n
Differential Output (Analog Output). Differential outputs.
8, 13 vdd Positive Supply Voltage. 2.5 V
DC
or 3.3 V
DC
nominal.
5, 16 gnd Ground. 0 V.
2vtOn-Chip Input Termination Node (Analog). Center tap between internal 50 Ohm
termination resistors.
See section 3.1, “Clock Inputs“ on page 6 for more information.
3ctrlDigital Control for On-Chip Input Termination (Input). Selects differential input mode;
0: DC coupled modes
1: AC coupled differential modes
These pins are internally pulled down to GND.
See section 3.1, “Clock Inputs“ on page 6 for more information.

ZL40203LDF1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Clock Buffer 1:4 LVPECL Fanout Buffer w/Int. Term.
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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