NCV4279A
http://onsemi.com
12
SENSE INPUT (SI) / SENSE OUTPUT (SO) VOLTAGE
MONITOR
An on−chip comparator is available to provide early
warning to the microprocessor of a possible reset signal. The
output is from an open collector driver. The reset signal
typically turns the microprocessor off instantaneously. This
can cause unpredictable results with the microprocessor.
The signal received from the SO pin will allow the
microprocessor time to complete its present task before
shutting down. This function is performed by a comparator
referenced to the band gap voltage. The actual trip point can
be programmed externally using a resistor divider to the
input monitor SI (Figure 20). The values for R
SI1
and R
SI2
are selected for a typical threshold of 1.20 V on the SI Pin.
SIGNAL OUTPUT
Figure 21 shows the SO Monitor timing waveforms as a
result of the circuit depicted in Figure 20. As the output
voltage (V
Q
) falls, the monitor threshold (V
SILOW
), is
crossed. This causes the voltage on the SO output to go low
sending a warning signal to the microprocessor that a reset
signal may occur in a short period of time. T
WA RN I NG
is the
time the microprocessor has to complete the function it is
currently working on and get ready for the reset
shutdown signal. When the voltage on the SO goes low and
the RO stays high the current consumption is typically
560 mA at 1 mA load current.
Figure 21. SO Warning Waveform Time Diagram
V
Q
SI
V
RO
V
SI,Low
T
WARNING
SO
STABILITY CONSIDERATIONS
The input capacitor C
I
in Figure 20 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1.0 W in series
with C
I.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
The 10 mF output capacitor C
Q
shown in Figure 20 should
work for most applications; however, it is not necessarily the
optimized solution. Stability is guaranteed at CQ is min
2.2 mF and max ESR is 10 W. There is no min ESR limit
which was proved with MURATA’s ceramic caps
GRM31MR71A225KA01 (2.2 mF, 10 V, X7R, 1206) and
GRM31CR71A106KA01 (10 mF, 10 V, X7R, 1206) directly
soldered between output and ground pins.
CALCULATING POWER DISSIPATION IN A SINGLE
OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output
regulator (Figure 20) is:
P
D(max)
+ [V
I(max)
* V
Q(min)
]I
Q(max)
) V
I(max)
I
q
(eq. 4)
where:
V
I(max)
is the maximum input voltage,
V
Q(min)
is the minimum output voltage,
I
Q(max)
is the maximum output current for the application,
and I
q
is the quiescent current the regulator consumes at
I
Q(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
q
JA
can be calculated:
(eq. 5)
R
q
JA
= (150°C – T
A
) / P
D
The value of R
q
JA
can then be compared with those in the
package section of the data sheet. Those packages with R
q
JA
’s
less than the calculated value in equation 2 will keep the die
temperature below 150°C. In some cases, none of the packages
will be sufficient to dissipate the heat generated by the IC, and
an external heatsink will be required. The current flow and
voltages are shown in the Measurement Circuit Diagram.
HEATSINKS
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
q
JA
:
R
qJA
+ R
qJC
) R
qCS
) R
qSA
(eq. 6)
where:
R
q
JC
= the junction−to−case thermal resistance,
R
q
CS
= the case−to−heat sink thermal resistance, and
R
q
SA
= the heat sink−to−ambient thermal resistance.
R
q
JC
appears in the package section of the data sheet. Like
R
q
JA
, it too is a function of package type. R
q
CS
and R
q
SA
are
functions of the package type, heatsink and the interface
between them. These values appear in data sheets of
heatsink manufacturers. Thermal, mounting, and
heatsinking considerations are discussed in the
ON Semiconductor application note AN1040/D, available
on the ON Semiconductor website.
