OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

74LV132N,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
74LV132_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 2 July 2009 13 of 17
NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
Fig 16. Package outline SOT402-1 (TSSOP14)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.72
0.38
8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1 MO-153
99-12-27
03-02-18
w M
b
p
D
Z
e
0.25
17
14
8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M
A
X
A
y
0 2.5 5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
A
max.
1.1
pin 1 index
74LV132_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 2 July 2009 14 of 17
NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
Fig 17. Package outline SOT762-1 (DHVQFN14)
terminal 1
index area
0.51
A
1
E
h
b
UNIT
ye
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
3.1
2.9
D
h
1.65
1.35
y
1
2.6
2.4
1.15
0.85
e
1
2
0.30
0.18
0.05
0.00
0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT762-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT762-1
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
26
13
9
8
7
1
14
X
D
E
C
B
A
02-10-17
03-01-27
terminal 1
index area
AC
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
74LV132_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 2 July 2009 15 of 17
NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
16. Abbreviations
17. Revision history
Table 11. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LV132_5 20090702 Product data sheet - 74LV132_4
Modifications:
• Table 6: the conditions for HIGH-level output voltage and LOW-level output voltage have been
changed.
74LV132_4 20071112 Product data sheet - 74LV132_3
74LV132_3 20040415 Product specification - 74LV132_2
74LV132_2 19980428 Product specification - 74LV132_1
74LV132_1 19970204 Product specification - -
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

74LV132N,112

Mfr. #:
Buy 74LV132N,112
Manufacturer:
NXP Semiconductors
Description:
Logic Gates QUAD 2-INPUT NAND
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet