74HC58D,653

December 1990 4
Philips Semiconductors Product specification
Dual AND-OR gate 74HC58
Fig.4 Functional diagram. Fig.5 Logic diagram.
FUNCTION TABLE
(1)
INPUTS OUTPUT
1A 1B 1C 1D 1E 1F 1Y
L
L
L
X
X
X
X
X
L
L
X
X
X
X
X
L
X
X
L
X
X
L
X
X
L
X
X
L
X
X
L
L
L
L
L
X
X
X
X
X
H
L
X
X
X
X
H
X
L
L
L
X
H
X
L
X
X
H
X
X
X
L
X
H
X
L
X
X
L
H
X
L
L
L
L
H
H
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
INPUTS OUTPUT
2A 2B 2C 2D 2Y
L
L
X
X
X
H
X
X
L
L
X
H
L
X
L
X
H
X
X
L
X
L
H
X
L
L
L
L
H
H
December 1990 5
Philips Semiconductors Product specification
Dual AND-OR gate 74HC58
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
I
CC
category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS+25 40 to +85 40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
1A,1B,1C,1D,1E,
1F to 1Y
36
13
10
115
23
20
145
29
25
175
35
30
ns 2.0
4.5
6.0
Fig.6
t
PHL
/ t
PLH
propagation delay
2A,2B,2C,2D to 2Y
30
11
9
100
20
17
125
25
21
150
30
26
ns 2.0
4.5
6.0
Fig.6
t
THL
/ t
TLH
output transition
time
19
7
6
75
15
13
95
19
16
110
22
19
ns 2.0
4.5
6.0
Fig.6
Fig.6 Waveforms showing the input (nA, nB, nC, nD, 1E, 1F) to output (nY) propagation delays and the output
transition times.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
handbook, full pagewidth
MBA336
t
PHL
V
M
(1)
t
THL
t
PLH
t
TLH
V
M
(1)
nA, nB, nC, nD,
1E, 1F INPUT
nY OUTPUT

74HC58D,653

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC DUAL AND-OR GATE 14SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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