CY7C1353F
Document #: 38-05212 Rev. *B Page 10 of 13
Switching Waveforms
Read/Write Waveforms
[18, 19, 20]
WRITE
D(A1)
123456789
CLK
t
CYC
t
CL
t
CH
10
CE
t
CEH
t
CES
WE
CEN
t
CENH
t
CENS
BW
[A:B]
ADV/LD
t
AH
t
AS
ADDRESS
A1 A2
A3
A4
A5 A6 A7
t
DH
t
DS
DQ
C
OMMAND
t
CLZ
D(A1) D(A2) Q(A4)Q(A3)
D(A2+1)
t
DOH
t
CHZ
t
CDV
WRITE
D(A2)
BURST
WRITE
D(A2+1)
READ
Q(A3)
READ
Q(A4)
BURST
READ
Q(A4+1)
WRITE
D(A5)
READ
Q(A6)
WRITE
D(A7)
DESELECT
OE
t
OEV
t
OELZ
t
OEHZ
DON’T CARE UNDEFINED
D(A5)
t
DOH
Q(A4+1)
D(A7)Q(A6)
CY7C1353F
Document #: 38-05212 Rev. *B Page 11 of 13
Notes:
18.
For this waveform ZZ is tied low.
19. When CE
is LOW, CE
1
is LOW, CE
2
is HIGH and CE
3
is LOW. When CE is HIGH, CE
1
is HIGH or CE
2
is LOW or CE
3
is HIGH.
20. Order of the Burst sequence is determined by the status of the MODE (0= Linear, 1= Interleaved). Burst operations are optional.
21. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrates CEN
being used to create a pause. A write is not performed during this cycle.
22. Device must be deselected when entering ZZ mode. See truth table for all possible signal conditions to deselect the device.
23. DQs are in high-Z when exiting ZZ sleep mode.
NOP, STALL and DESELECT Cycles
[18, 19, 21]
ZZ Mode Timing
[22,23]
Switching Waveforms
READ
Q(A3)
45678910
A3 A4
A5
D(A4)
123
CLK
CE
WE
CEN
BW
[A:B]
ADV/LD
ADDRESS
DQ
C
OMMAND
WRITE
D(A4)
STALLWRITE
D(A1)
READ
Q(A2)
STALL NOP READ
Q(A5)
DESELECT CONTINUE
DESELECT
DON’T CARE UNDEFINED
t
CHZ
A1 A2
Q(A2)D(A1) Q(A3)
t
DOH
Q(A5)
t
ZZ
I
SUPPLY
CLK
ZZ
t
ZZREC
LL INPUTS
(except ZZ)
DON’T CARE
I
DDZZ
t
ZZI
t
RZZI
Outputs (Q)
High-Z
DESELECT or READ Only
CY7C1353F
Document #: 38-05212 Rev. *B Page 12 of 13
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
ZBT is a trademark of Integrated Device Technology. NoBL and No Bus Latency are trademarks of Cypress Semiconductor. All
product and company names mentioned in this document are the trademarks of their respective holders.
Ordering Information
Speed
(MHz) Ordering Code
Package
Name Package Type
Operating
Range
133 CY7C1353F-133AC A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Commercial
133 CY7C1353F-133AI A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Industrial
117 CY7C1353F-117AC A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Commercial
117 CY7C1353F-117AI A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Industrial
100 CY7C1353F-100AC A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Commercial
100 CY7C1353F-100AI A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Industrial
66 CY7C1353F- 66AC A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Commercial
66 CY7C1353F- 66AI A101 100-Lead 14 x 20 x 1.4 mm Thin Quad Flat Pack Industrial
Shaded areas contain advance information. Please contain your local sales representative for more information on ordering these parts.
Package Diagrams
100-lead Thin Plastic Quad Flatpack (14 x 20 x 1.4 mm) A101
51-85050-*A

CY7C1353F-100AC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC SRAM 4.5M PARALLEL 100TQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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