CY7C1353F
Document #: 38-05212 Rev. *B Page 7 of 13
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on V
DD
Relative to GND........ –0.5V to +4.6V
DC Voltage Applied to Outputs
in three-state ....................................... –0.5V to V
DDQ
+ 0.5V
DC Input Voltage....................................–0.5V to V
DD
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Range
Ambient
Temperature (T
A
) V
DD
V
DDQ
Com’l 0°C to +70°C 3.3V – 5%/+10% 2.5V – 5% to
V
DD
Ind’l −40°C to +85°C
Electrical Characteristics Over the Operating Range
[9,10]
Parameter Description Test Conditions Min. Max. Unit
V
DD
Power Supply Voltage 3.135 3.6 V
V
DDQ
I/O Supply Voltage 2.375 V
DD
V
V
OH
Output HIGH Voltage V
DDQ
= 3.3V, V
DD
= Min., I
OH
= –4.0 mA 2.4 V
V
DDQ
= 2.5V, V
DD
= Min., I
OH
= –1.0 mA 2.0 V
V
OL
Output LOW Voltage V
DDQ
= 3.3V, V
DD
= Min., I
OH
= 8.0 mA 0.4 V
V
DDQ
= 2.5V, V
DD
= Min., I
OH
= 1.0 mA 0.4 V
V
IH
Input HIGH Voltage V
DDQ
= 3.3V 2.0 V
DD
+ 0.3V V
Input HIGH Voltage V
DDQ
= 2.5V 1.7 V
DD
+ 0.3V V
V
IL
Input LOW Voltage
[9]
V
DDQ
= 3.3V –0.3 0.8 V
Input LOW Voltage
[9]
V
DDQ
= 2.5V –0.3 0.7 V
I
X
Input Load Current
(except ZZ and MODE)
GND ≤ V
I
≤ V
DDQ
−55µA
Input Current of MODE Input = V
SS
–30 µA
Input = V
DD
5 µA
Input Current of ZZ Input = V
SS
–5 µA
Input = V
DD
30 µA
I
OZ
Output Leakage Current GND ≤ V
I
≤ V
DD
, Output Disabled –5 5 µA
I
OS
Output Short Circuit Current V
DD
= Max., V
OUT
= GND –300 µA
I
DD
V
DD
Operating Supply
Current
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
7.5-ns cycle, 133 MHz 225 mA
8.5-ns cycle, 117 MHz 220 mA
10-ns cycle, 100 MHz 205 mA
15-ns cycle, 66 MHz 195 mA
I
SB1
Automatic CE Power-down
Current—TTL Inputs
V
DD
= Max, Device Deselected,
V
IN
≥ V
IH
or V
IN
≤ V
IL
, f = f
MAX
,
inputs switching
7.5-ns cycle, 133 MHz 90 mA
8.5-ns cycle, 117 MHz 85 mA
10-ns cycle, 100 MHz 80 mA
15-ns cycle, 66 MHz 60 mA
I
SB2
Automatic CE Power-down
Current—CMOS Inputs
V
DD
= Max, Device Deselected,
V
IN
≥ V
DD
– 0.3V or V
IN
≤ 0.3V,
f = 0, inputs static
All speeds 40 mA
Shaded areas contain advance information.
Notes:
9. Overshoot: V
IH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC)> -2V (Pulse width less than tCYC/2).
10. T
Power-up
: Assumes a linear ramp from 0V to VDD (min.) within 200ms. During this time VIH < VDD and VDDQ < VDD.