74LVC16373APVG

INDUSTRIAL TEMPERATURE RANGE
IDT74LVC16373A
3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH
1
JULY 2015INDUSTRIAL TEMPERATURE RANGE
IDT and the IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2015 Integrated Device Technology, Inc. DSC-4624/6
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμ
μμ
μ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC16373A
DESCRIPTION:
The LVC16373A 16-bit transparent D-type latch is built using advanced
dual metal CMOS technology. This high-speed, low-power latch is ideal
for temporary storage of data. The LVC16373A can be used for implement-
ing memory address latches, I/O ports, and bus drivers. The Output Enable
and Latch Enable controls are organized to operate each device as two 8-
bit latches or one 16-bit latch. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for improved noise
margin.
All pins of the LVC16373A can be driven from either 3.3V or 5V devices.
This feature allows the use of this device as a translator in a mixed 3.3V/
5V supply system.
The LVC16373A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
1OE
D
C
1LE
1D1
1
Q1
TO SEVEN OTHER CHANNELS
2OE
D
C
2LE
2D1
2
Q1
1
48
47
24
25
36
2
13
Q
Q
TO SEVEN OTHER CHANNELS
3.3V CMOS 16-BIT
TRANSPARENT D-TYPE
LATCH WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
INDUSTRIAL TEMPERATURE RANGE
2
IDT74LVC16373A
3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
Symbol Description Max Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –50 to +50 mA
I
IK Continuous Clamp Current, 50 mA
IOK VI < 0 or VO < 0
I
CC Continuous Current through each ±100 mA
ISS VCC or GND
ABSOLUTE MAXIMUM RATINGS
(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 6.5 8 pF
C
I/O I/O Port Capacitance VIN = 0V 6.5 8 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
1Q2
GND
V
CC
GND
GND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
40
41
42
43
44
45
46
47
481
1Q1
1
OE
1Q4
1
Q3
1
Q6
1
Q5
1
Q8
1
Q7
2
Q1
2
Q3
2
Q2
2
Q4
VCC
2Q5
2
Q6
GND
2Q7
2
Q8
2
OE
1D2
GND
V
CC
GND
GND
1D1
1
LE
1D4
1
D3
1
D6
1
D5
1
D8
1
D7
2
D1
2
D3
2
D2
2
D4
VCC
2D5
2
D6
GND
2D7
2
D8
2
LE
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2. Output level before the indicated steady-state input conditions were established.
Inputs Outputs
xDx xLE xOE xQx
HH L H
LH L L
XL L Q
(2)
XX H Z
FUNCTION TABLE
(1)
Pin Names Description
xDx Data Inputs
xLE Latch Enable Input (Active HIGH)
xOE Output Enable Inputs (Active LOW)
x Q x 3-State Outputs
PIN DESCRIPTION
INDUSTRIAL TEMPERATURE RANGE
IDT74LVC16373A
3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH
3
Symbol Parameter Test Conditions Min. Typ.
(1)
Max. Unit
VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 V
VCC = 2.7V to 3.6V 2
V
IL Input LOW Voltage Level VCC = 2.3V to 2.7V 0.7 V
VCC = 2.7V to 3.6V 0.8
I
IH Input Leakage Current VCC = 3.6V VI = 0 to 5.5V ±5 μA
IIL
IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V ±10 μA
IOZL (3-State Output pins)
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO 5.5V ±50 μA
VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA –0.7 –1.2 V
VH Input Hysteresis VCC = 3.3V 100 mV
I
CCL Quiescent Power Supply Current VCC = 3.6V VIN = GND or VCC —— 10μA
ICCH
ICCZ 3.6 VIN 5.5V
(2)
—— 10
ΔICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND 500 μA
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. This applies in the disabled state only.
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Min. Max. Unit
VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 V
VCC = 2.3V IOH = – 6mA 2
VCC = 2.3V IOH = – 12mA 1.7
VCC = 2.7V 2.2
VCC = 3V 2.4
VCC = 3V IOH = – 24mA 2.2
VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA 0.2 V
VCC = 2.3V IOL = 6mA 0.4
IOL = 12mA 0.7
VCC = 2.7V IOL = 12mA 0.4
VCC = 3V IOL = 24mA 0.55

74LVC16373APVG

Mfr. #:
Manufacturer:
IDT
Description:
Latches 16-bit Transparent D-Type Latch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union