LT3581
25
3581fb
For more information www.linear.com/LT3581
APPENDIX
The use of the external PMOS, controlled by the GATE pin,
is particularly beneficial when dealing with unintended
output shorts in a boost regulator. In a conventional boost
regulator, the inductor, Schottky diode, and power switches
are susceptible to damage in the event of an output short
to ground. Using an external PMOS in the boost regulator’s
power path (path from V
IN
to V
OUT
) controlled by the GATE
pin, will serve to disconnect the input from the output
when the output has a short to ground, thereby helping
save the IC, and the other components in the power path
from damage. Ensure that both, the diode and the inductor
can survive low duty cycle current pulses of 3 to 4 times
their steady state levels.
The PMOS chosen must be capable of handling the maxi
-
mum input or output current depending on whether the
PMOS is used at the input (see Figure 11) or the output
(see Figure 18).
Ensure that the PMOS is biased with enough sour
ce to
gate voltage (V
SG
) to enhance the device into the triode
mode of operation. The higher the V
SG
voltage that biases
the PMOS into triode, the lower the R
DSON
of the PMOS,
thereby lowering power dissipation in the device during
normal operation, as well as improving the efficiency of
the application in which the PMOS is used. The follow
-
ing equations show the relationship between R
GATE
(see
Block Diagram) and the desired V
SG
that the PMOS is
biased with:
V
SG
=
V
IN
R
GATE
R
GATE
+ 2kΩ
if V
GATE
< 2V
933µA•R
GATE
if V
GATE
≥ 2V
When using a PMOS, it is advisable to configure the specific
application for undervoltage lockout (see the Operations
section). The goal is to have V
IN
get to a certain minimum
voltage where the PMOS has sufficient headroom to attain
a high enough V
SG
, which prevents it from entering the
saturation mode of operation during start-up.
Figure 18 shows the PMOS connected in series with the
output to act as an output disconnect during a fault con
-
dition. The Schottky diode from the V
IN
pin to the GATE
pin is optional and helps turn off the PMOS quicker in the
event of hard shorts. The resistor divider from V
IN
to the
SHDN pin sets a UVLO of 4V for this application.
Connecting the PMOS in series with the output offers certain
advantages over connecting it in series with the input:
• Since the load current is always less than the input
current for a boost converter, the current rating of the
PMOS goes down.
• A PMOS in series with the output can be biased with
a higher overdrive voltage than a PMOS used in series
with the input, since V
OUT
> V
IN
. This higher overdrive
results in a lower R
DSON
rating for the PMOS, thereby
improving the efficiency of the regulator.
In contrast, an input connected PMOS works as a simple
hot-plug controller (covered in more detail in the Hot-Plug
section). The input connected PMOS also functions as an
inexpensive means of protecting against multiple output
shorts in boost applications that synchronize the LT3581
with other compatible ICs (see Figure 11).
Table 7 shows a list of several discrete PMOS manufa-
cturers. Consult the manufacturers for detailed information
on their entire selection of PMOS devices.
Table 7. Discrete PMOS Manufacturers
Vishay www.vishay.com
Fairchild Semiconductor www.fairchildsemi.com
COMPENSATION – ADJUSTMENT
To compensate the feedback loop of the LT3581, a series
resistor-capacitor network in parallel with an optional
single capacitor should be connected from the V
C
pin to
GND. For most applications, choose a series capacitor in
the range of 1nF to 10nF with 2.2nF being a good starting
value. The optional parallel capacitor should range in value
from 47pF to 160pF with 100pF being a good starting
value. The compensation resistor, R
C
, is usually in the
range of 5k to 50k with 10k being a good starting value.
A good technique to compensate a new application is to
use a 100k potentiometer in place of the series resistor R
C
.
With the series and parallel capacitors at 2.2nF and 100pF
respectively, adjust the potentiometer while observing the
transient response and the optimum value for R
C
can be
