16
FN8127.4
November 12, 2015
CS vs. RESET Timing
RESET
Output Timing
SYMBOL PARAMETER MIN TYP MAX UNIT
V
TRIP
Reset trip point voltage, X5083PT-4.5A (Note 6)
Reset trip point voltage, X5083PT
Reset trip point voltage, X5083PT-2.7A
Reset trip point voltage, X5083PT-2.7
4.5
4.25
2.85
2.55
4.63
4.38
2.93
2.63
4.75
4.5
3.00
2.7
V
t
PURST
Power-up reset time out 100 200 280 ms
t
RPD
(Note 5) V
CC
detect to reset/output 500 ns
t
F
(Note 5) V
CC
fall time 0.1 ns
t
R
(Note 5) V
CC
rise time 0.1 ns
V
RVALID
Reset valid V
CC
1V
NOTES:
5. This parameter is periodically sampled and not 100% tested.
6. PT = Package/Temperature
CS
t
CST
RESET
t
WDO
t
RST
t
WDO
t
RST
RESET Output Timing
SYMBOL PARAMETER MIN TYP MAX UNIT
t
WDO
Watchdog time out period,
WD1 = 1, WD0 = 1(default)
WD1 = 1, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 0, WD0 = 0
100
450
1
OFF
200
600
1.4
300
800
2
ms
ms
sec
t
CST
CS pulse width to reset the watchdog 400 ns
t
RST
Reset time out 100 200 300 ms
X5083
17
FN8127.4
November 12, 2015
V
TRIP
Programming Timing Diagram
SCK
SI
CS
0001h (set)
V
CC
(V
TRIP
)
V
PE
t
TSU
t
THD
t
VPH
t
VPS
V
P
V
TRIP
t
RP
t
VPO
t
PCS
02h06h
0003h (reset)WREN Write
Addr.
00
Data
V
TRIP
Programming Parameters
PARAMETER DESCRIPTION MIN MAX UNIT
t
VPS
V
TRIP
program enable voltage setup time 1 µs
t
VPH
V
TRIP
program enable voltage hold time 1 µs
t
PCS
V
TRIP
programming CS inactive time 1 µs
t
TSU
V
TRIP
setup time s
t
THD
V
TRIP
hold (stable) time 10 ms
t
WC
V
TRIP
write cycle time 10 ms
t
VPO
V
TRIP
program enable voltage off time (between successive adjustments) 0 µs
t
RP
V
TRIP
program recovery period (between successive adjustments) 10 ms
V
P
Programming voltage 15 18 V
V
TRAN
V
TRIP
programmed voltage range 2.0 5.0 V
V
tv
V
TRIP
program variation after programming (0-75°C). (programmed at 25°C) -25 +25 mV
NOTES:
7. V
TRIP
programming parameters are periodically sampled and are not 100% tested.
8. For custom V
TRIP
settings, Contact Factory.
X5083
18
FN8127.4
November 12, 2015
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com
.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE REVISION CHANGE
November 12, 2015 FN8127.4 Updated Ordering Information table on page 3.
Added Revision History and About Intersil sections.
Updated POD MDP0027 to POD M8.15E.
X5083

X5083S8Z

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Supervisory Circuits CPU SUP/WDT 8K SPI EE RST LW 5V+/-10%
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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