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PCF8563T/5,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 11 — 26 October 2015 43 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
23. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5
Table 4. Formatted registers overview . . . . . . . . . . . . . .6
Table 5. Control_status_1 - control and status register 1
(address 00h) bit description . . . . . . . . . . . . . . .7
Table 6. Control_status_2 - control and status register 2
(address 01h) bit description . . . . . . . . . . . . . . .7
Table 7. INT
operation (bit TI_TP = 1)
[1]
. . . . . . . . . . . . . .9
Table 8. VL_seconds - seconds and clock integrity status
register (address 02h) bit description . . . . . . . .9
Table 9. Seconds coded in BCD format . . . . . . . . . . . . .9
Table 10. Minutes - minutes register (address 03h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 11. Hours - hours register (address 04h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 12. Days - days register (address 05h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 13. Weekdays - weekdays register (address 06h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 14. Weekday assignments . . . . . . . . . . . . . . . . . . .11
Table 15. Century_months - century flag and months
register (address 07h) bit description . . . . . . . .11
Table 16. Month assignments in BCD format. . . . . . . . . .11
Table 17. Years - years register (08h) bit description. . . .12
Table 18. Minute_alarm - minute alarm register
(address 09h) bit description . . . . . . . . . . . . . .13
Table 19. Hour_alarm - hour alarm register (address 0Ah)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 20. Day_alarm - day alarm register (address 0Bh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 21. Weekday_alarm - weekday alarm register
(address 0Ch) bit description . . . . . . . . . . . . . .14
Table 22. CLKOUT_control - CLKOUT control register
(address 0Dh) bit description . . . . . . . . . . . . . .15
Table 23. Timer_control - timer control register
(address 0Eh) bit description . . . . . . . . . . . . . .16
Table 24. Timer - timer value register (address 0Fh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .16
Table 25. Timer register bits value range . . . . . . . . . . . . .16
Table 26. First increment of time circuits after STOP
bit release . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 27. Register reset value
[1]
. . . . . . . . . . . . . . . . . . .20
Table 28. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .27
Table 29. Static characteristics . . . . . . . . . . . . . . . . . . . .28
Table 30. Dynamic characteristics . . . . . . . . . . . . . . . . . .30
Table 31. SnPb eutectic process (from J-STD-020D) . . .37
Table 32. Lead-free process (from J-STD-020D) . . . . . .37
Table 33. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 34. Revision history . . . . . . . . . . . . . . . . . . . . . . . .40
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 11 — 26 October 2015 44 of 45
NXP Semiconductors
PCF8563
Real-time clock/calendar
24. Figures
Fig 1. Block diagram of PCF8563 . . . . . . . . . . . . . . . . . .3
Fig 2. Pin configuration for HVSON10 (PCF8563BS) . . .4
Fig 3. Pin configuration for SO8 (PCF8563T) . . . . . . . . .4
Fig 4. Pin configuration for TSSOP8 (PCF8563TS). . . . .4
Fig 5. Interrupt scheme . . . . . . . . . . . . . . . . . . . . . . . . . .8
Fig 6. Voltage-low detection. . . . . . . . . . . . . . . . . . . . . .10
Fig 7. Data flow for the time function . . . . . . . . . . . . . . .12
Fig 8. Access time for read/write operations . . . . . . . . .13
Fig 9. Alarm function block diagram. . . . . . . . . . . . . . . .15
Fig 10. STOP bit functional diagram . . . . . . . . . . . . . . . .18
Fig 11. STOP bit release timing. . . . . . . . . . . . . . . . . . . .18
Fig 12. POR override sequence . . . . . . . . . . . . . . . . . . .20
Fig 13. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Fig 14. Definition of START and STOP conditions. . . . . .21
Fig 15. System configuration . . . . . . . . . . . . . . . . . . . . . .22
Fig 16. Acknowledgement on the I
2
C-bus . . . . . . . . . . . .22
Fig 17. Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Fig 18. Master transmits to slave receiver
(WRITE mode). . . . . . . . . . . . . . . . . . . . . . . . . . .23
Fig 19. Master reads after setting register address (write
register address; READ data) . . . . . . . . . . . . . . .24
Fig 20. Master reads slave immediately after first byte
(READ mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Fig 21. Interface watchdog timer . . . . . . . . . . . . . . . . . . .25
Fig 22. Device diode protection diagram . . . . . . . . . . . . .26
Fig 23. Supply current I
DD
as a function of supply voltage
V
DD
; CLKOUT disabled . . . . . . . . . . . . . . . . . . . .29
Fig 24. Supply current I
DD
as a function of supply voltage
V
DD
; CLKOUT = 32 kHz. . . . . . . . . . . . . . . . . . . .29
Fig 25. Supply current I
DD
as a function of temperature
T; CLKOUT = 32 kHz . . . . . . . . . . . . . . . . . . . . . .30
Fig 26. Frequency deviation as a function of supply voltage
V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Fig 27. I
2
C-bus timing waveforms . . . . . . . . . . . . . . . . . .31
Fig 28. Application diagram . . . . . . . . . . . . . . . . . . . . . . .32
Fig 29. Package outline SOT650-1 (HVSON10) of
PCF8563BS. . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Fig 30. Package outline SOT96-1 (SO8) of PCF8563T. .34
Fig 31. Package outline SOT505-1 (TSSOP8) of
PCF8563TS. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Fig 32. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
NXP Semiconductors
PCF8563
Real-time clock/calendar
© NXP Semiconductors N.V. 2015. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 26 October 2015
Document identifier: PCF8563
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
25. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Functional description . . . . . . . . . . . . . . . . . . . 6
8.1 CLKOUT output . . . . . . . . . . . . . . . . . . . . . . . . 6
8.2 Register organization . . . . . . . . . . . . . . . . . . . . 6
8.3 Control registers . . . . . . . . . . . . . . . . . . . . . . . . 7
8.3.1 Register Control_status_1 . . . . . . . . . . . . . . . . 7
8.3.2 Register Control_status_2 . . . . . . . . . . . . . . . . 7
8.3.2.1 Interrupt output . . . . . . . . . . . . . . . . . . . . . . . . . 8
8.4 Time and date registers . . . . . . . . . . . . . . . . . . 9
8.4.1 Register VL_seconds . . . . . . . . . . . . . . . . . . . . 9
8.4.1.1 Voltage-low detector and clock monitor . . . . . 10
8.4.2 Register Minutes. . . . . . . . . . . . . . . . . . . . . . . 10
8.4.3 Register Hours . . . . . . . . . . . . . . . . . . . . . . . . 10
8.4.4 Register Days. . . . . . . . . . . . . . . . . . . . . . . . . 10
8.4.5 Register Weekdays. . . . . . . . . . . . . . . . . . . . . 11
8.4.6 Register Century_months. . . . . . . . . . . . . . . . 11
8.4.7 Register Years . . . . . . . . . . . . . . . . . . . . . . . . 12
8.5 Setting and reading the time. . . . . . . . . . . . . . 12
8.6 Alarm registers . . . . . . . . . . . . . . . . . . . . . . . . 13
8.6.1 Register Minute_alarm . . . . . . . . . . . . . . . . . . 13
8.6.2 Register Hour_alarm . . . . . . . . . . . . . . . . . . . 14
8.6.3 Register Day_alarm . . . . . . . . . . . . . . . . . . . . 14
8.6.4 Register Weekday_alarm . . . . . . . . . . . . . . . . 14
8.6.5 Alarm flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.7 Register CLKOUT_control and clock output. . 15
8.8 Timer function. . . . . . . . . . . . . . . . . . . . . . . . . 16
8.8.1 Register Timer_control . . . . . . . . . . . . . . . . . . 16
8.8.2 Register Timer . . . . . . . . . . . . . . . . . . . . . . . . 16
8.9 EXT_CLK test mode. . . . . . . . . . . . . . . . . . . . 17
8.9.1 Operation example: . . . . . . . . . . . . . . . . . . . . 17
8.10 STOP bit function . . . . . . . . . . . . . . . . . . . . . . 18
8.11 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.11.1 Power-On Reset (POR) override . . . . . . . . . . 20
9 Characteristics of the I
2
C-bus . . . . . . . . . . . . 21
9.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9.2 START and STOP conditions . . . . . . . . . . . . . 21
9.3 System configuration . . . . . . . . . . . . . . . . . . . 21
9.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.5 I
2
C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . 23
9.5.1 Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.5.2 Clock and calendar READ or WRITE cycles . 23
9.6 Interface watchdog timer . . . . . . . . . . . . . . . . 25
10 Internal circuitry . . . . . . . . . . . . . . . . . . . . . . . 26
11 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 27
12 Static characteristics . . . . . . . . . . . . . . . . . . . 28
13 Dynamic characteristics. . . . . . . . . . . . . . . . . 30
14 Application information . . . . . . . . . . . . . . . . . 32
14.1 Quartz frequency adjustment. . . . . . . . . . . . . 32
14.1.1 Method 1: fixed OSCI capacitor. . . . . . . . . . . 32
14.1.2 Method 2: OSCI trimmer . . . . . . . . . . . . . . . . 32
14.1.3 Method 3: OSCO output . . . . . . . . . . . . . . . . 32
15 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 33
16 Handling information . . . . . . . . . . . . . . . . . . . 36
17 Soldering of SMD packages. . . . . . . . . . . . . . 36
17.1 Introduction to soldering. . . . . . . . . . . . . . . . . 36
17.2 Wave and reflow soldering. . . . . . . . . . . . . . . 36
17.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 37
17.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 37
18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 38
19 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
20 Revision history . . . . . . . . . . . . . . . . . . . . . . . 40
21 Legal information . . . . . . . . . . . . . . . . . . . . . . 41
21.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 41
21.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
21.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 41
21.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 42
22 Contact information . . . . . . . . . . . . . . . . . . . . 42
23 Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
24 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
25 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45

PCF8563T/5,518

Mfr. #:
Buy PCF8563T/5,518
Manufacturer:
NXP Semiconductors
Description:
Real Time Clock Binary I2C 1-5V RTC IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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