AD829ARZ-REEL Datasheet AD829JRZ-REEL7, AD829JNZ, AD829SQ | P4-P6

Data Sheet AD829

Rev. I | Page 3 of 20

SPECIFICATIONS

T

A

= 25°C and V

S

= ±15 V dc, unless otherwise noted.

Table 1.

AD829JR AD829AR AD829AQ/AD829S

Parameter Conditions V

S

Min Typ Max Min Typ Max Min Typ Max Unit

INPUT OFFSET VOLTAGE t

MIN

to t

MAX

±5 V,

±15 V

0.2 1

0.1 0.5 mV

1

0.5 mV

Offset Voltage Drift

±5 V,

±15 V

0.3 0.3 0.3 µV/°C

INPUT BIAS CURRENT

±5 V,

±15 V

3.3 7 3.3 7 3.3 7 µA

t

MIN

to t

MAX

8.2 9.5 9.5 µA

INPUT OFFSET CURRENT

±5 V,

±15 V

50 500 50 500 50 500 nA

t

MIN

to t

MAX

500 500 500 nA

Offset Current Drift

± 5 V,

±15 V

0.5 0.5 0.5 nA/°C

OPEN-LOOP GAIN

V

O

= ±2.5 V,

R

L

= 500 Ω

±5 V 30 65 30 65 30 65 V/mV

R

L

= 150 Ω 40 40 40 V/mV

t

MIN

to t

MAX

20 20 20 V/mV

V

O

= ±10 V,

R

L

= 1 kΩ

±15 V 50 100 50 100 50 100 V/mV

R

L

= 500 Ω 85 85 85 V/mV

t

MIN

to t

MAX

20 20 20 V/mV

DYNAMIC PERFORMANCE

Gain Bandwidth Product ±5 V 600 600 600 MHz

±15 V 750 750 750 MHz

Full Power Bandwidth

1, 2

V

O

= 2 V p-p,

R

L

= 500 Ω

±5 V 25 25 25 MHz

V

O

= 20 V p-p,

R

L

= 1 kΩ

±15 V

3.6

MHz

Slew Rate

2

R

L

= 500 Ω ±5 V 150 150 150 V/µs

R

L

= 1 kΩ ±15 V 230 230 230 V/µs

Settling Time to 0.1% A

V

= –19

−2.5 V to

+2.5 V

±5 V 65 65 65 ns

10 V step ±15 V 90 90 90 ns

Phase Margin

2

C

L

= 10 pF ±15 V

R

L

= 1 kΩ 60 60 60 Degrees

DIFFERENTIAL GAIN ERROR

3

R

L

= 100 Ω,

C

COMP

= 30 pF

±15 V 0.02 0.02 0.02 %

DIFFERENTIAL PHASE ERROR

3

R

L

= 100 Ω,

C

COMP

= 30 pF

±15 V 0.04 0.04 0.04 Degrees

COMMON-MODE REJECTION

V

CM

= ±2.5 V

±5 V

100

120

100

120

100

120

dB

V

CM

= ±12 V ±15 V 100 120 100 120 100 120 dB

t

MIN

to t

MAX

96 96 96 dB

POWER SUPPLY REJECTION

V

S

= ±4.5 V

to ±18 V

98

120

98

120

98

120

dB

t

MIN

to t

MAX

94 94 94 dB

INPUT VOLTAGE NOISE f = 1 kHz ±15 V 1.7 2 1.7 2 1.7 2 nV/√Hz

INPUT CURRENT NOISE f = 1 kHz ±15 V 1.5 1.5 1.5 pA/√Hz

AD829 Data Sheet

Rev. I | Page 4 of 20

AD829JR AD829AR AD829AQ/AD829S

Parameter Conditions V

S

Min Typ Max Min Typ Max Min Typ Max Unit

INPUT COMMON-MODE

VOLTAGE RANGE

±5 V +4.3 +4.3 +4.3 V

−3.8 −3.8 −3.8 V

±15 V +14.3 +14.3 +14.3 V

−13.8 −13.8 −13.8 V

OUTPUT VOLTAGE SWING R

L

= 500 Ω ±5 V ±3.0 ±3.6 ±3.0 ±3.6 ±3.0 ±3.6 V

R

L

= 150 Ω ±5 V ±2.5 ±3.0 ±2.5 ±3.0 ±2.5 ±3.0 V

R

L

= 50 Ω ±5 V ±1.4 ±1.4 ±1.4 V

R

L

= 1 kΩ ±15 V ±12 ±13.3 ±12 ±13.3 ±12 ±13.3 V

R

L

= 500 Ω ±15 V ±10 ±12.2 ±10 ±12.2 ±10 ±12.2 V

Short-Circuit Current

±5 V,

±15 V

32 32 32 mA

INPUT CHARACTERISTICS

Input Resistance

(Differential)

13 13 13 kΩ

Input Capacitance

(Differential)

4

5 5 5 pF

Input Capacitance

(Common Mode)

1.5 1.5 1.5 pF

CLOSED-LOOP OUTPUT

RESISTANCE

A

V

= +1,

f = 1 kHz

2 2 2 mΩ

POWER SUPPLY

Operating Range ±4.5 ±18 ±4.5 ±18 ±4.5 ±18 V

Quiescent Current ±5 V 5 6.5 5 6.5 5 6.5 mA

t

MIN

to t

MAX

8.0 8.0 8.7 mA

±15 V

5.3

6.8

5.3

6.8

5.3

6.8

mA

t

MIN

to t

MAX

8.3 9.0 9.0 mA

TRANSISTOR COUNT

Number of

transistors

46 46 46

1

Full power bandwidth = slew rate/2 π V

PEAK

.

2

Tested at gain = 20, C

COMP

= 0 pF.

3

3.58 MHz (NTSC) and 4.43 MHz (PAL and SECAM).

4

Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.

Data Sheet AD829

Rev. I | Page 5 of 20

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage ±18 V

Internal Power Dissipation

1

8-Lead PDIP (N) 1.3 W

8-Lead SOIC (R) 0.9 W

8-Lead CERDIP (Q) 1.3 W

20-Terminal LCC (E) 0.8 W

Differential Input Voltage

2

±6 V

Output Short-Circuit Duration

Indefinite

Storage Temperature Range

8-Lead CERDIP (Q) and 20-Terminal LCC (E) −65°C to +150°C

8-Lead PDIP (N) and 8-Lead SOIC (R) −65°C to +125°C

Operating Temperature Range

AD829J 0°C to 70°C

AD829A

−40°C to +125°C

AD829S −55°C to +125°C

Lead Temperature (Soldering, 60 sec) 300°C

1

Maximum internal power dissipation is specified so that T

J

does not exceed

150°C at an ambient temperature of 25°C.

2

If the differential voltage exceeds 6 V, external series protection resistors

should be added to limit the input current.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL CHARACTERISTICS

Table 3.

Package Type θ

JA

Unit

8-Lead PDIP (N)

100 (derates at 8.7 mW/°C)

°C/W

8-Lead CERDIP (Q) 110 (derates at 8.7 mW/°C) °C/W

20-Lead LCC (E) 77 °C/W

8-Lead SOIC (R) 125 (derates at 6 mW/°C) °C/W

METALLIZATION PHOTO

Figure 3. Metallization Photo; Contact Factory for Latest Dimensions,

Dimensions Shown in Inches and (Millimeters)

Figure 4. Maximum Power Dissipation vs. Temperature

ESD CAUTION

00880-003

–IN

2

OFFSET NULL

1

0.054

(1.37)

0.067 (1.70)

SUBSTRATE CONNECTED TO +V

S

OFFSET NULL

8

+V

S

7

–V

S

4

C

COMP

5

OUTPUT

6

+IN

3

00880-004

AMBIENT TEMPERATURE (°C)

MAXIMUM POWER DISSIPATION (W)

–55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115

0

0.5

1.0

1.5

2.0

2.5

125

CERDIP

SOIC

PDIP

LCC

AD829ARZ-REEL

AD829ARZ-REEL

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