DS667F2 Copyright 2010 Cirrus Logic (All Rights Reserved) 19
EP9307
ARM9 SOC with Ethernet, USB, Display and Touchscreen
Static Memory Single Word Read Cycle
See “Timing Conditions” on page 14 for definition of HCLK.
Parameter Symbol Min Typ Max Unit
AD setup to CSn assert time
t
ADs
0--ns
AD hold from CSn deassert time
t
ADh
t
HCLK
-
-ns
RDn assert time
t
RDpw
-
t
HCLK
× (WST1 + 2)
-ns
CSn to RDn delay time
t
RDd
--3ns
CSn assert to DQMn assert delay time
t
DQMd
--1ns
DA setup to RDn deassert time
t
DAs
t
HCLK
+ 12
--ns
DA hold from RDn deassert time
t
DAh
0--ns
Figure 6. Static Memory Single Word Read Cycle Timing Measurement
20 Copyright 2010 Cirrus Logic (All Rights Reserved) DS667F2
EP9307
ARM9 SOC with Ethernet, USB, Display and Touchscreen
Static Memory Single Word Write Cycle
Parameter Symbol Min Typ Max Unit
AD setup to WRn assert time
t
ADs
t
HCLK
- 3
-
-ns
AD hold from WRn deassert time
t
ADh
t
HCLK
× 2
--ns
WRn deassert to CSn deassert time
t
CSh
7
-
-ns
CSn to WRn assert delay time
t
WRd
--2ns
WRn assert time
t
WRpw
-
t
HCLK
× (WST1 + 1)
-ns
CSn to DQMn assert delay time
t
DQMd
--1ns
WRn deassert to DA transition time
t
DAh
t
HCLK
-
-ns
WRn assert to DA valid
t
DAV
--8ns
Figure 7. Static Memory Single Word Write Cycle Timing Measurement
CSn
WRn
RDn
DQMn
AD
DA
t
ADs
t
ADh
t
CSh
t
WRd
t
WRpw
t
DAh
WAIT
t
DQMd
t
DAV
DS667F2 Copyright 2010 Cirrus Logic (All Rights Reserved) 21
EP9307
ARM9 SOC with Ethernet, USB, Display and Touchscreen
Static Memory 32-bit Read on 8-bit External Bus
Parameter Symbol Min Typ Max Unit
AD setup to CSn assert time
t
ADs
t
HCLK
-
-ns
CSn assert to Address transition time
t
AD1
-
t
HCLK
× (WST1 + 1)
-ns
Address assert time
t
AD2
-
t
HCLK
× (WST1 + 1)
-ns
AD transition to CSn deassert time
t
AD3
-
t
HCLK
× (WST1 + 2)
-ns
AD hold from CSn deassert time
t
ADh
t
HCLK
--ns
RDn assert time
t
RDpwL
-
t
HCLK
× (4 × WST1 + 5)
-ns
CSn to RDn delay time
t
RDd
-- 3ns
CSn assert to DQMn assert delay time
t
DQMd
-- 1ns
DA setup to AD transition time
t
DAs1
15 - - ns
DA setup to RDn deassert time
t
DAs2
t
HCLK
+ 12
--ns
DA hold from AD transition time
t
DAh1
0- -ns
DA hold from RDn deassert time
t
DAh2
0- -ns
Figure 8. Static Memory Multiple Word Read 8-bit Cycle Timing Measurement
1

EP9307-IR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Microprocessors - MPU IC Universal Platfrm ARM9 SOC Prcessor
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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