PIC18F2XXX/4XXX FAMILY
DS30009622M-page 40 2010-2015 Microchip Technology Inc.
PIC18F4585 0Eh 101x xxxx
PIC18F4610 0Ch 001x xxxx
PIC18F4620 0Ch 000x xxxx
PIC18F4680 0Eh 100x xxxx
PIC18F4682 27h 010x xxxx
PIC18F4685 27h 011x xxxx
TABLE 5-2: DEVICE ID VALUES (CONTINUED)
Device
Device ID Value
DEVID2 DEVID1
Legend: The ‘xs in DEVID1 contain the device revision code.
Note 1: DEVID1 bit 4 is used to determine the device type (REV4 = 0).
2: DEVID1 bit 4 is used to determine the device type (REV4 = 1).
2010-2015 Microchip Technology Inc. DS30009622M-page 41
PIC18F2XXX/4XXX FAMILY
TABLE 5-3: PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS
Bit Name
Configuration
Words
Description
IESO CONFIG1H Internal External Switchover bit
1 = Internal External Switchover mode is enabled
0 = Internal External Switchover mode is disabled
FCMEN CONFIG1H Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
FOSC<3:0> CONFIG1H Oscillator Selection bits
11xx = External RC oscillator, CLKO function on RA6
101x = External RC oscillator, CLKO function on RA6
1001 = Internal RC oscillator, CLKO function on RA6, port function on RA7
1000 = Internal RC oscillator, port function on RA6, port function on RA7
0111 = External RC oscillator, port function on RA6
0110 = HS oscillator, PLL is enabled (Clock Frequency = 4 x FOSC1)
0101 = EC oscillator, port function on RA6
0100 = EC oscillator, CLKO function on RA6
0011 = External RC oscillator, CLKO function on RA6
0010 = HS oscillator
0001 = XT oscillator
0000 = LP oscillator
FOSC<3:0> CONFIG1H Oscillator Selection bits
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
111x = HS oscillator, PLL is enabled, HS is used by USB
110x = HS oscillator, HS is used by USB
1011 = Internal oscillator, HS is used by USB
1010 = Internal oscillator, XT is used by USB
1001 = Internal oscillator, CLKO function on RA6, EC is used by USB
1000 = Internal oscillator, port function on RA6, EC is used by USB
0111 = EC oscillator, PLL is enabled, CLKO function on RA6, EC is used by USB
0110 = EC oscillator, PLL is enabled, port function on RA6, EC is used by USB
0101 = EC oscillator, CLKO function on RA6, EC is used by USB
0100 = EC oscillator, port function on RA6, EC is used by USB
001x = XT oscillator, PLL is enabled, XT is used by USB
000x = XT oscillator, XT is used by USB
USBDIV CONFIG1L USB Clock Selection bit
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
Selects the clock source for full-speed USB operation:
1 = USB clock source comes from the 96 MHz PLL divided by 2
0 = USB clock source comes directly from the OSC1/OSC2 oscillator block;
no divide
CPUDIV<1:0> CONFIG1L CPU System Clock Selection bits
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
11 = CPU system clock divided by 4
10 = CPU system clock divided by 3
01 = CPU system clock divided by 2
00 = No CPU system clock divide
Note 1: The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
2: Not available in PIC18FXX8X and PIC18F2450/4450 devices.
PIC18F2XXX/4XXX FAMILY
DS30009622M-page 42 2010-2015 Microchip Technology Inc.
PLLDIV<2:0> CONFIG1L Oscillator Selection bits
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
Divider must be selected to provide a 4 MHz input into the 96 MHz PLL:
111 = Oscillator divided by 12 (48 MHz input)
110 = Oscillator divided by 10 (40 MHz input)
101 = Oscillator divided by 6 (24 MHz input)
100 = Oscillator divided by 5 (20 MHz input)
011 = Oscillator divided by 4 (16 MHz input)
010 = Oscillator divided by 3 (12 MHz input)
001 = Oscillator divided by 2 (8 MHz input)
000 = No divide – oscillator used directly (4 MHz input)
VREGEN CONFIG2L USB Voltage Regulator Enable bit
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
1 = USB voltage regulator is enabled
0 = USB voltage regulator is disabled
BORV<1:0> CONFIG2L Brown-out Reset Voltage bits
11 =V
BOR is set to 2.0V
10 =V
BOR is set to 2.7V
01 =V
BOR is set to 4.2V
00 =V
BOR is set to 4.5V
BOREN<1:0> CONFIG2L Brown-out Reset Enable bits
11 = Brown-out Reset is enabled in hardware only (SBOREN is disabled)
10 = Brown-out Reset is enabled in hardware only and disabled in Sleep mode
SBOREN is disabled)
01 = Brown-out Reset is enabled and controlled by software (SBOREN is
enabled)
00 = Brown-out Reset is disabled in hardware and software
PWRTEN CONFIG2L Power-up Timer Enable bit
1 = PWRT is disabled
0 = PWRT is enabled
WDPS<3:0> CONFIG2H Watchdog Timer Postscaler Select bits
1111 = 1:32,768
1110 = 1:16,384
1101 = 1:8,192
1100 = 1:4,096
1011 = 1:2,048
1010 = 1:1,024
1001 = 1:512
1000 = 1:256
0111 = 1:128
0110 = 1:64
0101 = 1:32
0100 = 1:16
0011 = 1:8
0010 = 1:4
0001 = 1:2
0000 = 1:1
TABLE 5-3: PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
Note 1: The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
2: Not available in PIC18FXX8X and PIC18F2450/4450 devices.

PIC18LF4510-I/PT

Mfr. #:
Manufacturer:
Microchip Technology
Description:
8-bit Microcontrollers - MCU 32KB 1536 RAM 36I/O
Lifecycle:
New from this manufacturer.
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