Rev E 11/12/14 4 FEMTOCLOCK®, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
840002-01 DATA SHEET
Table 4. Crystal Characteristics
NOTE: Characterized using an 18pF parallel resonant crystal.
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= V
DDA
= V
DDO
= 3.3V±5%, T
A
= -30°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Refer to Phase Noise Plot.
Table 5B. AC Characteristics, V
DD
= V
DDA
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= -30°C to 85°C
For NOTES, see Table 5A above.
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 25 MHz
Equivalent Series Resistance (ESR) 50
Shunt Capacitance (C
O
) 7pF
Drive Level 1mW
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency
F_SEL[1:0] = 00 140 175 MHz
F_SEL[1:0] = 01 or 11 112 140 MHz
F_SEL[1:0] = 10 56 70 MHz
tsk(o) Output Skew; NOTE 1, 2 12 ps
tjit(Ø)
RMS Phase Jitter, Random;
NOTE 3
156.25MHz, (1.875MHz - 20MHz) 0.47 ps
125MHz, (1.875MHz - 20MHz) 0.57 ps
62.5MHz, (1.875MHz - 20MHz) 0.51 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 700 ps
odc Output Duty Cycle 46 54 %
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency
F_SEL[1:0] = 00 140 175 MHz
F_SEL[1:0] = 01 or 11 112 140 MHz
F_SEL[1:0] = 10 56 70 MHz
tsk(o) Output Skew; NOTE 1, 2 12 ps
tjit(Ø)
RMS Phase Jitter, Random;
NOTE 3
156.25MHz, (1.875MHz - 20MHz) 0.47 ps
125MHz, (1.875MHz - 20MHz) 0.55 ps
62.5MHz, (1.875MHz - 20MHz) 0.49 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 700 ps
odc Output Duty Cycle
46 54 %
f
OUT
= 125MHz 47 53 %
Rev E 11/12/14 5 FEMTOCLOCK®, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
840002-01 DATA SHEET
Typical Phase Noise at 62.5MHz (3.3V)
Typical Phase Noise at 156.25MHz (3.3V)
1Gb Ethernet Filter
Phase Noise Result by adding a
1Gb Ethernet filter to raw data
Raw Phase Noise Data
62.5MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.51ps (typical)
Offset Frequency (Hz)
Noise Power dBc
Hz
10Gb Ethernet Filter
Phase Noise Result by adding a
10Gb Ethernet filter to raw data
Raw Phase Noise Data
156.25MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.47ps (typical)
Offset Frequency (Hz)
Noise Power dBc
Hz
Rev E 11/12/14 6 FEMTOCLOCK®, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
840002-01 DATA SHEET
Parameter Measurement Information
3.3V Core/3.3V Output Load AC Test Circuit
RMS Phase Jitter
Output Skew
3.3V Core/2.5V Output Load AC Test Circuit
Output Skew
Output Duty Cycle/Pulse Width/Period
SCOPE
Qx
GND
V
DD,
1.65V±5%
-1.65V±5%
V
DDA,
V
DDO
Phase Noise Mas
k
Offset Frequency
f
1
f
2
Phase Noise Plot
RMS Jitter = Area Under the Masked Phase Noise Plot
Noise Power
20%
80%
80%
20%
t
R
t
F
Q[0:1]
SCOPE
Qx
LVCMOS
V
DDO
2
GND
V
DD,
V
DDA
V
DDO
2.05V±5%
-1.25V±5%
1.25V±5%
t
sk(o)
V
DDO
2
V
DDO
2
Qx
Qy
t
PERIOD
t
PW
t
PERIOD
odc =
V
DDO
2
x 100%
t
PW
Q[0:1]

840002AG-01LFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 2 LVCMOS OUT SYNTHESIZER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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