1©2016 Integrated Device Technology, Inc Revision A April 20, 2016
General Description
The 843N252-45 is a 1 LVPECL and 1 LVCMOS output Synthesizer
optimized to generate Ethernet reference clock frequencies. The
device uses IDT’s fourth generation FemtoClock
®
NG technology for
an optimum of high clock frequency and low phase noise
performance, combined with a low power consumption and high
power supply noise rejection. Using a 25MHz parallel resonant
crystal, the following frequencies can be generated: 156.25MHz and
125MHz. With a very low phase noise VCO it is targeted to achieve
0.4ps or lower typical rms phase jitter, easily meeting Ethernet jitter
requirements. The 843N252-45 is packaged in a small 16-pin
TSSOP package.
Features
Fourth generation FemtoClock
®
Next Generation (NG) technology
One differential 3.3V LVPECL output and one LVCMOS/LVTTL
output
Crystal oscillator interface designed for a 25MHz parallel resonant
crystal
A 25MHz crystal generates output frequencies of: 156.25MHz and
125MHz
VCO frequency: 625MHz
RMS Phase Jitter @ 156.25MHz, (12kHz – 20MHz) using a
25MHz crystal: 0.33ps (typical)
RMS Phase Jitter @ 125MHz, (12kHz – 20MHz) using a 25MHz
crystal: 0.39ps (typical)
Power supply noise rejection PSNR: -60dB (typical)
Full 3.3V supply mode
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
Block Diagram
Pin Assignment
843N252-45
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm package body
G Package
OSC
PFD
&
LPF
Feedback Divider
÷25
÷4
÷5
25MHz
QA
QB
nQB
CLK_ENA
XTAL_IN
XTAL_OUT
CLK_ENB
Pullup
Pullup
FemtoClock
®
NG
VCO
625MHz
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
VCCA
nc
nc
V
CCOA
QA
V
EE
CLK_ENA
CLK_ENB
V
EE
QB
nQB
V
CC
XTAL_IN
XTAL_OUT
V
EE
843N252-45
Data Sheet
FemtoClock
®
NG Crystal-to-3.3V
LVPECL Frequency Synthesizer
2©2016 Integrated Device Technology, Inc Revision A April 20, 2016
843N252-45 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3A. CLK_ENA Function Table Table 3B. CLK_ENB Function Table
Number Name Type Description
1 CLK_ENA Input Pullup Clock enable pin. LVCMOS/LVTTL interface levels. See Table 3A.
2, 9, 15 V
EE
Power Negative supply pins.
3 QA Output Single-ended clock output. LVCMOS/LVTTL interface levels.
4V
CCOA
Power Output supply pin for QA output.
5, 6 nc Unused No connect.
7V
CCA
Power Analog supply pin.
8, 12 V
CC
Power Power supply pin.
10
11
XTAL_OUT
XTAL_IN
Input Crystal oscillator interface XTAL_IN is the input, XTAL_OUT is the output.
13, 14 nQB, QB Output Differential output pair. LVPECL interface levels.
16 CLK_ENB Input Pullup Clock enable pin. LVCMOS/LVTTL interface levels. See Table 3B.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
C
PD
Power Dissipation Capacitance V
CC
= V
CCO_A
= 3.465V 7 pF
R
PULLUP
Input Pullup Resistor 51 k
R
OUT
Output Impedance QA V
CCO_A
= 3.465V 15
Input Outputs
CLK_ENA QA
0 High-Impedance
1 Active
Input Outputs
CLK_ENB QB nQB
0HIGHLOW
1 Active Active
3©2016 Integrated Device Technology, Inc Revision A April 20, 2016
843N252-45 Data Sheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
CC
= V
CCOA
= 3.3V ± 5%, V
EE
= 0V, T
A
= 0°C to 70°C
Table 4B. LVCMOS/LVTTL DC Characteristics, V
CC
= V
CCOA
= 3.3V ± 5%, V
EE
= 0V, T
A
= 0°C to 70°C
NOTE 1: Outputs terminated with 50 to V
CCOA
/2. See Parameter Measurement Information section. Load Test Circuit diagrams.
Item Rating
Supply Voltage, V
CC
3.63V
Inputs, V
I
XTAL_IN
Other Inputs
0V to V
CC
-0.5V to V
CC
+ 0.5V
Outputs, V
O
(LVCMOS)
Outputs, I
O
(LVPECL)
Continuos Current
Surge Current
-0.5V to V
CCOA
+ 0.5V
50mA
100mA
Package Thermal Impedance,
JA
94.8C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
CC
Power Supply Voltage 3.135 3.3 3.465 V
V
CCA
Analog Supply Voltage V
CC
– 0.14 3.3 V
CC
V
V
CCOA
Power Supply Voltage 3.135 3.3 3.465 V
I
CCA
Analog Supply Current 14 mA
I
EE
Power Supply Current No Load 124 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 V
CC
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input High Current
CLK_ENA,
CLK_ENB
V
CC
= V
IN
= 3.465V 5 µA
I
IL
Input Low Current
CLK_ENA,
CLK_ENB
V
CC
= 3.465V, V
IN
= 0V -150 µA
V
OH
Output High Voltage; NOTE 1 V
CCOA
= 3.3V ± 5% 2.3 V
V
OL
Output Low Voltage; NOTE 1 V
CCOA
= 3.3V ± 5% 0.5 V

843N252GG-45LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner FREQUENCY SYNTHESIZER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet