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SE95U,025

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27
SE95_7 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 07 — 2 September 2009 10 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
When reading register Temp, all 16 bits of the two data bytes (MSByte and LSByte) must
be collected and then the two’s complement data value according to the desired resolution
must be selected for the temperature calculation. Table 8 shows the example for 11-bit
two’s complement data value, Table 9 shows the example for 13-bit two’s complement
data value.
When converting into the temperature the proper resolution must be used as listed in
Table 10 using either one of these two formulae:
1. If the Temp data MSB = 0, then: Temp (°C) = +(Temp data) × value resolution
2. If the Temp data MSB = 1, then: Temp (°C) = −(two’s complement Temp data) × value
resolution
Table 11 shows some examples of the results for the 11-bit calculations.
Table 8. Example 11-bit two’s complement Temp register
MSByte LSByte
7654321076543210
D10D9D8D7D6D5D4D3D2D1D0XXXXX
Table 9. Example 13-bit two’s complement register
MSByte LSByte
7654321076543210
D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X
Table 10. Temp data and Temp value resolution
Data resolution Value resolution
8 bit 1.0 °C
9 bit 0.5 °C
10 bit 0.25 °C
11 bit 0.125 °C
12 bit 0.0625 °C
13 bit 0.03125 °C
Table 11. Temp register value
11-bit binary
(two’s complement)
Hexadecimal value Decimal value Value
011 1111 1000 3F8 1016 +127.000 °C
011 1111 0111 3F7 1015 +126.875 °C
011 1111 0001 3F1 1009 +126.125 °C
011 1110 1000 3E8 1000 +125.000 °C
000 1100 1000 0C8 200 +25.000 °C
000 0000 0001 001 1 +0.125 °C
000 0000 0000 000 0 0.000 °C
111 1111 1111 7FF −1 −0.125 °C
111 0011 1000 738 −200 −25.000 °C
110 0100 1001 649 −439 −54.875 °C
110 0100 1000 648 −440 −55.000 °C
SE95_7 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 07 — 2 September 2009 11 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
Obviously, for 9-bit Temp data application in replacing the industry standard LM75, just
use only 9 MSB bits of the two bytes and disregard 7 LSB of the LSByte. The 9-bit Temp
data with 0.5 °C resolution of the SE95 is defined exactly in the same way as for the
standard LM75 and it is here similar to the Tos and Thyst registers.
8.6 Overtemperature shutdown threshold and hysteresis registers
These two registers, are write/read registers, and also called set-point registers. They are
used to store the user-defined temperature limits, called overtemperature shutdown
threshold (Tos) and hysteresis temperature (Thyst), for the device watchdog operation. At
the end of each conversion the Temp data will be compared with the data stored in these
two registers in order to set the state of the device OS output; see Section 7.1.
Each of the set-point registers contains two 8-bit data bytes consisting of one MSByte and
one LSByte the same as register Temp. However, only 9 bits of the two bytes are used to
store the set-point data in two’s complement format with the resolution of 0.5 °C. Table 12
and Table 13 show the bit arrangement of the Tos data and Thyst data in the data bytes.
Notice that because only 9-bit data are used in the set-point registers, the device uses
only the 9 MSB of the Temp data for data comparison.
When a set-point register is read, all 16 bits are provided to the bus and must be collected
by the controller to complete the bus operation. However, only the 9 most significant bits
should be used and the 7 LSB of the LSByte are equal to zero and should be ignored.
Table 14 shows examples of the limit data and value.
Table 12. Tos register
MSByte LSByte
7654321076543210
D8D7D6D5D4D3D2D1D0XXXXXXX
Table 13. Thyst register
MSByte LSByte
7654321076543210
D8D7D6D5D4D3D2D1D0XXXXXXX
Table 14. Tos and Thyst register
11-bit binary
(two’s complement)
Hexadecimal value Decimal value Value
0 1111 1010 0FA 250 125.0 °C
0 0011 0010 032 50 25.0 °C
0 0000 0001 001 1 0.5 °C
0 0000 0000 000 0 0.0 °C
1 1111 1111 1FF −1 −0.5 °C
1 1100 1110 1CE −50 −25.0 °C
1 1001 0010 192 −110 −55.0 °C
SE95_7 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 07 — 2 September 2009 12 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
8.7 Protocols for writing and reading the registers
The communication between the host and the SE95 must follow the rules strictly as
defined by the I
2
C-bus management. The protocols for SE95 register read/write
operations are illustrated in Figure 5 to Figure 10 together with the following definitions:
1. Before a communication, the I
2
C-bus must be free or not busy. It means that the SCL
and SDA lines must both be released by all devices on the bus, and they become
HIGH by the bus pull-up resistors.
2. The host must provide SCL clock pulses necessary for the communication. Data is
transferred in a sequence of 9 SCL clock pulses for every 8-bit data byte followed by
1-bit status of the acknowledgement.
3. During data transfer, except the START and STOP signals, the SDA signal must be
stable while the SCL signal is HIGH. It means that the SDA signal can be changed
only during the LOW duration of the SCL line.
4. S: START signal, initiated by the host to start a communication, the SDA goes from
HIGH-to-LOW while the SCL is HIGH.
5. RS: RE-START signal, same as the START signal, to start a read command that
follows a write command.
6. P: STOP signal, generated by the host to stop a communication, the SDA goes from
LOW-to-HIGH while the SCL is HIGH. The bus becomes free thereafter.
7. W: write bit, when the write/read bit is in a write command.
8. R: read bit, when the write/read bit is logic 1 in a read command.
9. A: device acknowledge bit, returned by the SE95. It is logic 0 if the device works
properly and logic 1 if not. The host must release the SDA line during this period in
order to give the device the control on the SDA line.
10. A’: master acknowledge bit, not returned by the device, but set by the master or host
in reading 2-byte data. During this clock period, the host must set the SDA line to
LOW in order to notify the device that the first byte has been read for the device to
provide the second byte onto the bus.
11. NA: not-acknowledge bit. During this clock period, both the device and host release
the SDA line at the end of a data transfer, the host is then enabled to generate the
stop signal.
12. In a write protocol, data is sent from the host to the device and the host controls the
SDA line, except during the clock period when the device sends the device
acknowledgement signal to the bus.
13. In a read protocol, data is sent to the bus by the device and the host must release the
SDA line during the time that the device is providing data onto the bus and controlling
the SDA line, except during the clock period when the master sends the master
acknowledgement signal to the bus.
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SE95U,025

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NXP Semiconductors
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SENSOR DIGITAL -55C-125C DIE
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