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PCA9624PW,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40
PCA9624 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 4.1 — 18 January 2016 7 of 40
NXP Semiconductors
PCA9624
8-bit Fm+ I
2
C-bus 100 mA 40 V LED driver
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
7.1.2 LED All Call I
2
C-bus address
• Default power-up value (ALLCALLADR register): E0h or 1110 000
• Programmable through I
2
C-bus (volatile programming)
• At power-up, LED All Call I
2
C-bus address is enabled. PCA9624 sends an ACK when
E0h (R/W
= 0) or E1h (R/W = 1) is sent by the master.
See Section 7.3.8 “
ALLCALLADR, LED All Call I
2
C-bus address” for more detail.
Remark: The default LED All Call I
2
C-bus address (E0h or 1110 000) must not be used as
a regular I
2
C-bus slave address since this address is enabled at power-up. All the
PCA9624s on the I
2
C-bus acknowledge the address if sent by the I
2
C-bus master.
7.1.3 LED Sub Call I
2
C-bus addresses
• 3 different I
2
C-bus addresses can be used
• Default power-up values:
– SUBADR1 register: E2h or 1110 001
– SUBADR2 register: E4h or 1110 010
– SUBADR3 register: E8h or 1110 100
• Programmable through I
2
C-bus (volatile programming)
• At power-up, Sub Call I
2
C-bus addresses are disabled. PCA9624 does not send an
ACK when E2h (R/W
=0) or E3h (R/W= 1), E4h (R/W = 0) or E5h (R/W =1), or
E8h (R/W
= 0) or E9h (R/W = 1) is sent by the master.
See Section 7.3.7 “
SUBADR1 to SUBADR3, I
2
C-bus subaddress 1 to 3” for more detail.
Remark: The default LED Sub Call I
2
C-bus addresses may be used as regular I
2
C-bus
slave addresses as long as they are disabled.
7.1.4 Software Reset I
2
C-bus address
The address shown in Figure 5 is used when a reset of the PCA9624 must be performed
by the master. The Software Reset address (SWRST Call) must be used with
R/W
= logic 0. If R/W = logic 1, the PCA9624 does not acknowledge the SWRST. See
Section 7.6 “
Software reset” for more detail.
Remark: The Software Reset I
2
C-bus address is a reserved address and cannot be used
as a regular I
2
C-bus slave address or as an LED All Call or LED Sub Call address.
Fig 5. Software Reset address
0
002aab416
0 0 0 0 0 1 1
R/W
PCA9624 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 4.1 — 18 January 2016 8 of 40
NXP Semiconductors
PCA9624
8-bit Fm+ I
2
C-bus 100 mA 40 V LED driver
7.2 Control register
Following the successful acknowledgement of the slave address, LED All Call address or
LED Sub Call address, the bus master sends a byte to the PCA9624, which is stored in
the Control register.
The lowest 5 bits are used as a pointer to determine which register is accessed (D[4:0]).
The highest 3 bits are used as Auto-Increment flag and Auto-Increment options (AI[2:0]).
When the Auto-Increment flag is set (AI2 = logic 1), the five low-order bits of the Control
register are automatically incremented after a read or write. This allows the user to
program the registers sequentially. Four different types of Auto-Increment are possible,
depending on AI1 and AI0 values.
Remark: Other combinations not shown in Table 4 (AI[2:0] = 001, 010, and 011) are
reserved and must not be used for proper device operation.
AI[2:0] = 000 is used when the same register must be accessed several times during a
single I
2
C-bus communication, for example, changes the brightness of a single LED. Data
is overwritten each time the register is accessed during a write operation.
AI[2:0] = 100 is used when all the registers must be sequentially accessed, for example,
power-up programming.
AI[2:0] = 101 is used when the 16 LED drivers must be individually programmed with
different values during the same I
2
C-bus communication, for example, changing color
setting to another color setting.
AI[2:0] = 110 is used when the LED drivers must be globally programmed with different
settings during the same I
2
C-bus communication, for example, global brightness or
blinking change.
reset state = 80h
Remark: The Control register does not apply to the Software Reset I
2
C-bus address.
Fig 6. Control register
Table 4. Auto-Increment options
AI2 AI1 AI0 Function
0 0 0 no Auto-Increment
1 0 0 Auto-Increment for all registers. D[4:0] roll over to 00h after the last
register (11h) is accessed.
1 0 1 Auto-Increment for individual brightness registers only. D[4:0] roll over to
02h after the last register (11h) is accessed.
1 1 0 Auto-Increment for global control registers only. D[4:0] roll over to 0Ah’
after the last register (0Bh) is accessed.
1 1 1 Auto-Increment for individual and global control registers only. D[4:0] roll
over to 02h after the last register (0Bh) is accessed.
002aac147
AI2 AI1 AI0 D4 D3 D2 D1 D0
Auto-Increment flag
register address
Auto-Increment options
PCA9624 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 4.1 — 18 January 2016 9 of 40
NXP Semiconductors
PCA9624
8-bit Fm+ I
2
C-bus 100 mA 40 V LED driver
AI[2:0] = 111 is used when individual and global changes must be performed during the
same I
2
C-bus communication, for example, changing a color and global brightness at the
same time.
Only the 5 least significant bits D[4:0] are affected by the AI[2:0] bits.
When the Control register is written, the register entry point determined by D[4:0] is the
first register that is addressed (read or write operation), and can be anywhere between
0 0000 and 1 0001 (as defined in Table 5
). When AI[2] = 1, the Auto-Increment flag is set
and the rollover value at which the register increment stops and goes to the next one is
determined by AI[2:0]. See Table 4
for rollover values. For example, if the Control register
= 1110 0100 (E4h), then the register addressing sequence is (in hexadecimal):
04 … 0B 02 … 0B 02 … 0B 02 … 0B 02 … as long
as the master keeps sending or reading data.
7.3 Register definitions
[1] Only D[4:0] = 0 0000 to 1 0001 are allowed and are acknowledged. D[4:0] = 1 0010 to 1 1111 are reserved and are not acknowledged.
Table 5. Register summary
[1]
Register number D4 D3 D2 D1 D0 Name Type Function
00h 0 0 0 0 0 MODE1 read/write Mode register 1
01h 0 0 0 0 1 MODE2 read/write Mode register 2
02h 0 0 0 1 0 PWM0 read/write brightness control LED0
03h 0 0 0 1 1 PWM1 read/write brightness control LED1
04h 0 0 1 0 0 PWM2 read/write brightness control LED2
05h 0 0 1 0 1 PWM3 read/write brightness control LED3
06h 0 0 1 1 0 PWM4 read/write brightness control LED4
07h 0 0 1 1 1 PWM5 read/write brightness control LED5
08h 0 1 0 0 0 PWM6 read/write brightness control LED6
09h 0 1 0 0 1 PWM7 read/write brightness control LED7
0Ah 0 1 0 1 0 GRPPWM read/write group duty cycle control
0Bh 0 1 0 1 1 GRPFREQ read/write group frequency
0Ch 0 1 1 0 0 LEDOUT0 read/write LED output state 0
0Dh 0 1 1 0 1 LEDOUT1 read/write LED output state 1
0Eh 01110SUBADR1 read/writeI
2
C-bus subaddress 1
0Fh 01111SUBADR2 read/writeI
2
C-bus subaddress 2
10h 10000SUBADR3 read/writeI
2
C-bus subaddress 3
11h 1 0 0 0 1 ALLCALLADR read/write LED All Call I
2
C-bus address
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PCA9624PW,118

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Buy PCA9624PW,118
Manufacturer:
NXP Semiconductors
Description:
LED Lighting Drivers 100 mA 40 V LED Driver
Lifecycle:
New from this manufacturer.
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