LOW SKEW, 1-TO-6, CRYSTAL OSCILLATOR/LVCMOS-TO-
3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER
8536I-33 DATA SHEET
6 REVISION B 7/10/15
TABLE 6A. LVPECL AC CHARACTERISTICS, V
CC
= V
CCO_LVPECL
= 3.3V±5%, V
EE
= 0V, TA = -40°C TO 85°C
TABLE 6B. LVPECL AC CHARACTERISTICS, V
CC
= V
CCO_LVPECL
= 2.5V±5%, V
EE
= 0V, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 266 MHz
t
PD
Propagation Delay; NOTE 1 1.2 1.95 ns
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
155.52MHz,
(Integration Range:
12kHz - 20MHz)
0.35 ps
tsk(b) Bank Skew; NOTE 2, 5 55 ps
tsk(o) Output Skew; NOTE 3, 5 80 ps
tsk(pp) Part-to-Part Skew; NOTE 4, 5 800 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 250 600 ps
odc Output Duty Cycle 46 54 %
All parameters measured at ƒ ≤ 266MHz unless noted otherwise.
NOTE 1: Measured from the V
CC
/2 of the input to the differential output crossing point.
NOTE 2: Defi ned as skew within a bank of outputs at the same voltage and with equal load conditions.
NOTE 3: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the LVPECL output differential cross points.
NOTE 4: Defi ned as skew between outputs on different devices operating at the same supply voltage and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the LVPECL output differential cross
points.
NOTE 5: This parameter is defi ned in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 266 MHz
t
PD
Propagation Delay; NOTE 1 1.3 2 ns
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
155.52MHz,
(Integration Range:
12kHz - 20MHz)
0.32 ps
tsk(b) Bank Skew; NOTE 2, 5 65 ps
tsk(o) Output Skew; NOTE 3, 5 80 ps
tsk(pp) Part-to-Part Skew; NOTE 4, 5 425 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 250 800 ps
odc Output Duty Cycle 46 54 %
All parameters measured at ƒ ≤ 266MHz unless noted otherwise.
NOTE 1: Measured from the V
CC
/2 of the input to the differential output crossing point.
NOTE 2: Defi ned as skew within a bank of outputs at the same voltage and with equal load conditions.
NOTE 3: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the LVPECL output differential cross points.
NOTE 4: Defi ned as skew between outputs on different devices operating at the same supply voltage and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the LVPECL output differential cross
points.
NOTE 5: This parameter is defi ned in accordance with JEDEC Standard 65.
