TJF1052I All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 3 — 20 May 2016 13 of 27
NXP Semiconductors
TJF1052i
Galvanically isolated high-speed CAN transceiver
11. Dynamic characteristics
[1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[2] See Figure 5
.
[3] Referenced to GND1.
[4] V
I
is the input voltage on TXD. See Figure 7 for test setup.
[5] The start-up time is the time from the application of power to valid data at the output. Guaranteed by design.
Table 12. Dynamic characteristics
T
vj
=
40
C to +125
C; V
DD1
= 3.0 V to 5.25 V with respect to GND1; V
DD2
= 4.75 V to 5.25 V with respect to GND2 unless
otherwise specified
[1]
.
Symbol Parameter Conditions Min Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 4
t
d(TXD-busdom)
delay time from TXD to bus dominant Normal mode - 72 120 ns
t
d(TXD-busrec)
delay time from TXD to bus recessive Normal mode - 97 120 ns
t
d(busdom-RXD)
delay time from bus dominant to RXD Normal mode - 67 130 ns
t
d(busrec-RXD)
delay time from bus recessive to RXD Normal mode - 72 130 ns
t
d(TXDL-RXDL)
delay time from TXD LOW to RXD LOW Normal mode 72 - 220 ns
t
d(TXDH-RXDH)
delay time from TXD HIGH to RXD HIGH Normal mode 72 - 220 ns
t
bit(bus)
transmitted recessive bit width t
bit(TXD)
= 500 ns
[2]
435 - 530 ns
t
bit(TXD)
= 200 ns
[2]
155 - 210 ns
t
bit(RXD)
bit time on pin RXD t
bit(TXD)
= 500 ns
[2]
400 - 550 ns
t
bit(TXD)
= 200 ns
[2]
120 - 220 ns
t
rec
receiver timing symmetry t
bit(TXD)
= 500 ns 65 - +40 ns
t
bit(TXD)
= 200 ns 45 - +15 ns
t
to(dom)TXD
TXD dominant time-out time V
TXD
= 0 V; Normal mode
[3]
0.3 1.7 5 ms
CMTI common-mode transient immunity V
I
=V
DD1
or V
I
=0 V
[4]
20 45 - kV/s
t
startup
start-up time
[5]
-- 500s
t
fltr(wake)bus
bus wake-up filter time Standby mode 0.5 1 3 s
