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95V842AFLFT

P1-P3P4-P6P7-P9
7
ICS95V842
0830B—11/24/08
(N is a large number of samples)
t
( ) n+1
t
()n
t
()
=
1
n=
N
t
()n
N
CLK_INC
CLK_INT
FB_INC
FB_INT
t
(SK_O)
Y
#
X
Y , FB_OUTC
X
Y , FB_OUTT
X
Y , FB_OUTC
X
Y , FB_OUTT
X
Y , FB_OUTC
X
Y , FB_OUTT
X
Y
X
Parameter Measurement Information
Figure 4. Static Phase Offset
Figure 5. Output
Skew
1
f
O
t
=
t
-
(jit_per) C(n)
1
f
O
Figure 6. Period Jitter
8
ICS95V842
0830B—11/24/08
Clock Inputs
and Outputs
80%
20%
80%
20%
Rise t
sl
Fall t
sl
V
ID
,V
OD
Figure 8. Input and Output Slew Rates
Parameter Measurement
Information
t
(hper_n)
t
(hper_n+1)
1
f
o
Y , FB_OUTC
X
Y , FB_OUTT
X
Figure 7. Half-Period Jitter
t
=-
(jit_Hper)
t
(jit_Hper_n)
1
2xf
O
9
ICS95V842
0830B—11/24/08
MIN MAX MIN MAX
A 1.351.75.053.069
A1 0.10 0.25 .004 .010
A2 -- 1.50 -- .059
b 0.200.30.008.012
c 0.180.25.007.010
D
E 5.806.20.228.244
E1 3.80 4.00 .150 .157
e
L 0.401.27.016.050
N
a0°8°0°8°
ZD
VARIATIONS
ZD ZD
MIN MAX (Ref) MIN MAX (Ref)
16 4.80 5.00 0.23 .189 .197 .009
10-0032
In Millimeters In Inches
COMMON DIMENSIONS
Reference Doc.: JEDEC Publication 95, MO-137
SEE VARIATIONS
0.635 BASIC 0.025 BASIC
COMMON DIMENSIONS
16-Lead, 150 mil SSOP (QSOP)
N
SEE VARIATIONS SEE VARIATIONS
D (inch)
SEE VARIATIONS SEE VARIATIONS
D mm.
SYMBOL
SEE VARIATIONS
Ordering Information
95V842yFzLF-T
XXXX y F z LF - T
Designation for tape and reel packaging
Lead Free, RoHS Compliant (Optional)
Temperature Grade
Blank = 0°C to +85°C (Commercial)
I = -40°C to +85°C (Industrial)
Package Type
F=SSOP
Revision Designator (will not correlate with datasheet revision)
Device Type
P1-P3P4-P6P7-P9

95V842AFLFT

Mfr. #:
Buy 95V842AFLFT
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 2.5V PHASE LOCK LOOP CLOCK
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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